[Patch v7 02/24] perf/x86/intel: Avoid PEBS event on fixed counters without extended PEBS

Dapeng Mi
2026-03-24T00:46:00Z

Before the introduction of extended PEBS, PEBS supported only
general-purpose (GP) counters. In a virtual machine (VM) environment,
the PEBS_BASELINE bit in PERF_CAPABILITIES may not be set, but the PEBS
format could be indicated as 4 or higher. In such cases, PEBS events
might be scheduled to fixed counters, and writing the corresponding bits
into the PEBS_ENABLE MSR could cause a #GP fault.

To fix this issue, enhance intel_pebs_constraints() to avoid scheduling
PEBS events on fixed counters if extended PEBS is not supported.

Reported-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---

V2: Restrict PEBS events work on only GP counters if no PEBS-baseline
suggested instead of limiting cpuc->pebs_enabled to PEBS capable
counters in v1.

arch/x86/events/intel/ds.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 5027afc97b65..49af127bff68 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -1557,6 +1557,14 @@ struct event_constraint *intel_pebs_constraints(struct perf_event *event)
if (pebs_constraints) {
for_each_event_constraint(c, pebs_constraints) {
if (constraint_match(c, event->hw.config)) {
+ /*
+ * If fixed counters are suggested in the constraints,
+ * but extended PEBS is not supported, empty constraint
+ * should be returned.
+ */
+ if ((c->idxmsk64 & ~PEBS_COUNTER_MASK) &&
+ !(x86_pmu.flags & PMU_FL_PEBS_ALL))
+ break;
event->hw.flags |= c->flags;
return c;
}
--
2.34.1