Re: [PATCH v2 3/2] sched/deadline: Check bandwidth overflow earlier for hotplug

[Jon Hunter <jonathanh@nvidia.com>]

On 13/01/2025 09:32, Juri Lelli wrote:
> On 10/01/25 18:40, Jon Hunter wrote:
> 
> ...
> 
>> With the above I see the following ...
>>
>> [   53.919672] dl_bw_manage: cpu=5 cap=3072 fair_server_bw=52428 total_bw=209712 dl_bw_cpus=4
>> [   53.930608] dl_bw_manage: cpu=4 cap=2048 fair_server_bw=52428 total_bw=157284 dl_bw_cpus=3
>> [   53.941601] dl_bw_manage: cpu=3 cap=1024 fair_server_bw=52428 total_bw=104856 dl_bw_cpus=2
> 
> So far so good.
> 
>> [   53.952186] dl_bw_manage: cpu=2 cap=1024 fair_server_bw=52428 total_bw=576708 dl_bw_cpus=2
> 
> But, this above doesn't sound right.
> 
>> [   53.962938] dl_bw_manage: cpu=1 cap=0 fair_server_bw=52428 total_bw=576708 dl_bw_cpus=1
>> [   53.971068] Error taking CPU1 down: -16
>> [   53.974912] Non-boot CPUs are not disabled
> 
> What is the topology of your board?

This is a Tegra186 and the topology is described in 
arch/arm64/boot/dts/nvidia/tegra186.dtsi. This is from the datasheet ...

"Two CPU clusters connected by a high-performance coherent interconnect 
fabric designed by NVIDIA; enables simultaneous operation of both CPU 
clusters for a true heterogeneous multi-processing (HMP) environment. 
The Denver 2 (Dual-Core) CPU clusters is optimized for higher 
single-thread performance; the ARM Cortex-A57 MPCore (Quad-Core) CPU 
clusters is better suited for multi-threaded applications and lighter 
loads."

So one of these ARM big.LITTLE style topologies.

> Are you using any cpuset configuration for partitioning CPUs?

Not that I am aware of.

> Also, could you please add sched_debug to the kernel cmdline and enable
> CONFIG_SCHED_DEBUG (if not enabled already)? That should print
> additional information about scheduling domains in case they get
> reconfigured for some reason.

OK I can enable that.

Thanks
Jon

-- 
nvpublic