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From: Krzysztof Kozlowski <krzk@kernel.org>
To: setotau@yandex.ru, Bjorn Andersson <andersson@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	~postmarketos/upstreaming@lists.sr.ht,
	Richard Acayan <mailingradian@gmail.com>
Subject: Re: [PATCH v4 2/3] dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl
Date: Fri, 29 Aug 2025 08:06:26 +0200	[thread overview]
Message-ID: <fcd25026-97f0-472a-a274-af342b1dce9c@kernel.org> (raw)
In-Reply-To: <20250828-sdm660-lpass-lpi-v4-2-af4afdd52965@yandex.ru>

On 28/08/2025 21:23, Nickolay Goppen via B4 Relay wrote:
> From: Nickolay Goppen <setotau@yandex.ru>
> 
> Add bindings for pin controller in SDM660 Low Power Audio SubSystem
> LPASS).
> 
> Co-developed-by: Richard Acayan <mailingradian@gmail.com>
> Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> Signed-off-by: Nickolay Goppen <setotau@yandex.ru>

Completely reversed/messed chain.

...

> +
> +properties:
> +  compatible:
> +    const: qcom,sdm660-lpass-lpi-pinctrl
> +
> +  reg:
> +    items:
> +      - description: LPASS LPI TLMM Control and Status registers


Clocks missing, maybe some other properties as well.


> +
> +patternProperties:
> +  "-state$":
> +    oneOf:
> +      - $ref: "#/$defs/qcom-sdm660-lpass-state"
> +      - patternProperties:
> +          "-pins$":
> +            $ref: "#/$defs/qcom-sdm660-lpass-state"
> +        additionalProperties: false
> +
> +$defs:
> +  qcom-sdm660-lpass-state:
> +    type: object
> +    description:
> +      Pinctrl node's client devices use subnodes for desired pin configuration.
> +      Client device subnodes use below standard properties.
> +    $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
> +    unevaluatedProperties: false
> +
> +    properties:
> +      pins:
> +        description:
> +          List of gpio pins affected by the properties specified in this
> +          subnode.
> +        items:
> +          pattern: "^gpio([0-9]|[1-2][0-9]|3[0-1])$"
> +
> +      function:
> +        enum: [ gpio, comp_rx, dmic12, dmic34, mclk0, pdm_2_gpios,
> +                pdm_clk, pdm_rx, pdm_sync ]
> +        description:
> +          Specify the alternative function to be configured for the specified
> +          pins.
> +
> +allOf:
> +  - $ref: qcom,lpass-lpi-common.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    lpi_tlmm: pinctrl@15070000 {
> +        compatible = "qcom,sdm660-lpass-lpi-pinctrl";
> +        reg = <0x15070000 0x20000>;
> +        gpio-controller;
> +        #gpio-cells = <2>;
> +        gpio-ranges = <&lpi_tlmm 0 0 32>;

That's quite incomplete example. Missing at least one pinmux node. See
other files.

> +    };
> 


Best regards,
Krzysztof

  reply	other threads:[~2025-08-29  6:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-28 19:23 [PATCH v4 0/3] Add SDM660 LPASS LPI TLMM Nickolay Goppen via B4 Relay
2025-08-28 19:23 ` [PATCH v4 1/3] pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets Nickolay Goppen via B4 Relay
2025-08-28 19:23 ` [PATCH v4 2/3] dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl Nickolay Goppen via B4 Relay
2025-08-29  6:06   ` Krzysztof Kozlowski [this message]
2025-08-29  6:07     ` Krzysztof Kozlowski
2025-08-29 17:19     ` Nickolay Goppen
2025-08-28 19:23 ` [PATCH v4 3/3] pinctrl: qcom: Add SDM660 LPASS LPI TLMM Nickolay Goppen via B4 Relay
2025-09-03 11:44   ` Konrad Dybcio
2025-09-03 11:47   ` Konrad Dybcio

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