From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
cros-qcom-dts-watchers@chromium.org,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: andersson@kernel.org, quic_vbadigan@quicinc.com,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH v2 0/8] PCI: Enable Power and configure the QPS615 PCIe switch
Date: Sun, 4 Aug 2024 10:57:49 +0200 [thread overview]
Message-ID: <fcfe1ce3-6835-44e8-807d-290a641813ed@kernel.org> (raw)
In-Reply-To: <20240803-qps615-v2-0-9560b7c71369@quicinc.com>
On 03/08/2024 05:22, Krishna chaitanya chundru wrote:
> QPS615 is the PCIe switch which has one upstream and three downstream
> ports. One of the downstream ports is used as endpoint device of Ethernet
> MAC. Other two downstream ports are supposed to connect to external
> device. One Host can connect to QPS615 by upstream port.
>
> QPS615 switch power is controlled by the GPIO's. After powering on
> the switch will immediately participate in the link training. if the
> host is also ready by that time PCIe link will established.
>
> The QPS615 needs to configured certain parameters like de-emphasis,
> disable unused port etc before link is established.
>
> The device tree properties are parsed per node under pci-pci bridge in the
> devicetree. Each node has unique bdf value in the reg property, driver
> uses this bdf to differentiate ports, as there are certain i2c writes to
> select particulat port.
>
> As the controller starts link training before the probe of pwrctl driver,
> the PCIe link may come up before configuring the switch itself.
> To avoid this introduce two functions in pci_ops to start_link() &
> stop_link() which will disable the link training if the PCIe link is
> not up yet.
>
> Now PCI pwrctl device is the child of the pci-pcie bridge, if we want
> to enable the suspend resume for pwrctl device there may be issues
> since pci bridge will try to access some registers in the config which
> may cause timeouts or Un clocked access as the power can be removed in
> the suspend of pwrctl driver.
>
> To solve this make PCIe controller as parent to the pci pwr ctrl driver
> and create devlink between host bridge and pci pwrctl driver so that
> pci pwrctl driver will go suspend only after all the PCIe devices went
> to suspend.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> Changes in V1:
> - Fix the code as per the comments given.
You did not implement the comments so such changelog is rather a joke.
Respond to each comment from v1 and acknowledge it.
Then write detailed changelog.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-08-04 8:57 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-03 3:22 [PATCH v2 0/8] PCI: Enable Power and configure the QPS615 PCIe switch Krishna chaitanya chundru
2024-08-03 3:22 ` [PATCH v2 1/8] dt-bindings: PCI: Add binding for qps615 Krishna chaitanya chundru
2024-08-03 4:33 ` Rob Herring (Arm)
2024-08-03 11:00 ` Dmitry Baryshkov
2024-08-05 4:16 ` Krishna Chaitanya Chundru
2024-08-04 8:53 ` Krzysztof Kozlowski
2024-08-05 4:11 ` Krishna Chaitanya Chundru
2024-08-05 5:14 ` Krzysztof Kozlowski
2024-08-05 5:26 ` Krishna Chaitanya Chundru
2024-08-05 5:28 ` Krzysztof Kozlowski
2024-08-05 5:57 ` Krishna Chaitanya Chundru
2024-08-05 14:43 ` Krzysztof Kozlowski
2024-08-22 14:16 ` Manivannan Sadhasivam
2024-08-23 9:01 ` Krzysztof Kozlowski
2024-08-23 9:44 ` Manivannan Sadhasivam
2024-08-23 13:51 ` Krzysztof Kozlowski
2024-08-23 15:11 ` Manivannan Sadhasivam
2024-08-05 17:07 ` Bjorn Andersson
2024-08-05 17:18 ` Krzysztof Kozlowski
2024-08-08 12:01 ` Manivannan Sadhasivam
2024-08-08 12:13 ` Krzysztof Kozlowski
2024-08-08 12:41 ` Manivannan Sadhasivam
2024-08-08 13:06 ` Krzysztof Kozlowski
2024-08-08 13:29 ` Manivannan Sadhasivam
2024-08-22 14:09 ` Manivannan Sadhasivam
2024-08-23 9:06 ` Krzysztof Kozlowski
2024-08-23 9:40 ` Manivannan Sadhasivam
2024-08-04 8:56 ` Krzysztof Kozlowski
2024-08-05 4:02 ` Krishna Chaitanya Chundru
2024-08-05 5:12 ` Krzysztof Kozlowski
2024-08-05 5:33 ` Krishna Chaitanya Chundru
2024-08-05 16:39 ` Bjorn Andersson
2024-08-05 16:58 ` Krzysztof Kozlowski
2024-08-03 3:22 ` [PATCH v2 2/8] dt-bindings: trivial-devices: Add qcom,qps615 Krishna chaitanya chundru
2024-08-04 8:50 ` Krzysztof Kozlowski
2024-08-05 4:11 ` Krishna Chaitanya Chundru
2024-08-03 3:22 ` [PATCH v2 3/8] arm64: dts: qcom: qcs6490-rb3gen2: Add node for qps615 Krishna chaitanya chundru
2024-08-04 8:54 ` Krzysztof Kozlowski
2024-08-05 4:14 ` Krishna Chaitanya Chundru
2024-09-09 11:29 ` Caleb Connolly
2024-09-09 11:51 ` Krishna Chaitanya Chundru
2024-09-09 12:54 ` Dmitry Baryshkov
2024-08-03 3:22 ` [PATCH v2 4/8] PCI: Change the parent to correctly represent pcie hierarchy Krishna chaitanya chundru
2024-08-06 19:07 ` Bjorn Helgaas
2024-08-06 20:06 ` Bartosz Golaszewski
2024-08-13 19:15 ` Bartosz Golaszewski
2024-08-22 19:28 ` Bjorn Helgaas
2024-08-22 20:01 ` Bartosz Golaszewski
2024-08-22 21:13 ` Bjorn Helgaas
2024-08-23 8:30 ` Manivannan Sadhasivam
2024-08-23 8:31 ` Bartosz Golaszewski
2024-08-23 7:23 ` Manivannan Sadhasivam
2024-08-03 3:22 ` [PATCH v2 5/8] PCI: Add new start_link() & stop_link function ops Krishna chaitanya chundru
2024-08-03 3:22 ` [PATCH v2 6/8] PCI: dwc: Add support for new pci function op Krishna chaitanya chundru
2024-08-03 3:22 ` [PATCH v2 7/8] PCI: qcom: Add support for host_stop_link() & host_start_link() Krishna chaitanya chundru
2024-08-06 19:12 ` Bjorn Helgaas
2024-09-02 6:51 ` Krishna Chaitanya Chundru
2024-09-02 18:32 ` Dmitry Baryshkov
2024-08-03 3:22 ` [PATCH v2 8/8] PCI: pwrctl: Add power control driver for qps615 Krishna chaitanya chundru
2024-08-03 11:34 ` Dmitry Baryshkov
2024-08-05 6:14 ` Krishna Chaitanya Chundru
2024-08-08 3:30 ` Dmitry Baryshkov
2024-09-02 7:12 ` Krishna Chaitanya Chundru
2024-09-02 7:20 ` Dmitry Baryshkov
2024-09-02 8:31 ` Krishna Chaitanya Chundru
2024-09-02 10:12 ` Dmitry Baryshkov
2024-09-02 10:47 ` Krishna Chaitanya Chundru
2024-09-02 18:37 ` Dmitry Baryshkov
2024-10-17 15:47 ` Krishna Chaitanya Chundru
2024-10-17 16:24 ` Dmitry Baryshkov
2024-08-03 10:56 ` [PATCH v2 0/8] PCI: Enable Power and configure the QPS615 PCIe switch Dmitry Baryshkov
2024-08-05 4:19 ` Krishna Chaitanya Chundru
2024-08-04 8:57 ` Krzysztof Kozlowski [this message]
2024-08-05 4:18 ` Krishna Chaitanya Chundru
2024-08-05 4:34 ` Krishna Chaitanya Chundru
2024-08-05 15:00 ` Rob Herring (Arm)
2024-08-06 15:24 ` Ilpo Järvinen
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