Re: [PATCH 15/24] x86/mm: Allow flushing for future ASID switches

[Dave Hansen <dave.hansen@linux.intel.com>]

On 11/30/2017 08:18 AM, Peter Zijlstra wrote:
> On Thu, Nov 30, 2017 at 07:51:17AM -0800, Dave Hansen wrote:
>> On 11/30/2017 07:44 AM, Peter Zijlstra wrote:
>>> On Mon, Nov 27, 2017 at 11:49:14AM +0100, Ingo Molnar wrote:
>>>> @@ -338,24 +366,23 @@ static inline void __native_flush_tlb_single(unsigned long addr)
>>>>  
>>>>  static inline void __flush_tlb_all(void)
>>>>  {
>>>> +	if (boot_cpu_has(X86_FEATURE_PGE)) {
>>>>  		__flush_tlb_global();
>>>> +	} else {
>>>>  		__flush_tlb();
>>>> +		tlb_flush_shared_nonglobals();
>>> I do however think this one is superfluous; if we do not have PGE we
>>> also do not have PCID and every CR3 switch flushes everything.
>>
>> I tried to sprinkle these around at all the sites that did non-global
>> kernel flushes.  In the case that it's superfluous !KAISER, it's a noop
>> anyway.  In the (currently unsupported) case that we *do* need it, well,
>> we need it.
> 
> I'm confused. When would we need it there?

__flush_tlb() does a flushing CR3 write that flushes the current PCID.
If we need other PCIDs flushed, we have to do it via the
tlb_flush_shared_nonglobals() mechanism.

Does it matter today in practice?  Nope, we never have that situation.
But, it also doesn't _hurt_ to have that line there in any way.