From: "Rangoju, Raju" <raju.rangoju@amd.com>
To: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
sanju.mehta@amd.com, krishnamoorthi.m@amd.com,
akshata.mukundshetty@amd.com
Subject: Re: [PATCH 2/9] spi: spi_amd: Enable dual and quad I/O modes
Date: Tue, 24 Sep 2024 20:53:32 +0530 [thread overview]
Message-ID: <ff19fa23-7846-654a-b1c2-e95bdd1adf36@amd.com> (raw)
In-Reply-To: <ZuvkOohXSzLZZAw7@finisterre.sirena.org.uk>
On 9/19/2024 2:13 PM, Mark Brown wrote:
> On Wed, Sep 18, 2024 at 04:20:30PM +0530, Raju Rangoju wrote:
>
>> {
>> /* bus width is number of IO lines used to transmit */
>> - if (op->cmd.buswidth > 1 || op->addr.buswidth > 1 ||
>> - op->data.buswidth > 1 || op->data.nbytes > AMD_SPI_MAX_DATA)
>> + if (op->cmd.buswidth > 1 || op->addr.buswidth > 4 ||
>> + op->data.buswidth > 4 || op->data.nbytes > AMD_SPI_MAX_DATA)
>> return false;
>
> I'm not seeing anything where we tell the hardware about the width?
The hardware already supports single, dual, and quad I/O modes, and this
functionality is enabled by default. No explicit software configuration
is necessary to select the desired I/O mode. The hardware will
automatically determine the appropriate mode based on the programmed
opcode. This current patch is only intended to communicate these
hardware capabilities to upper layers.
next prev parent reply other threads:[~2024-09-24 15:23 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-18 10:50 [PATCH 0/9] spi: spi_amd: Performance Optimization Patch Series Raju Rangoju
2024-09-18 10:50 ` [PATCH 1/9] spi: spi_amd: Sort headers alphabetically Raju Rangoju
2024-09-18 10:50 ` [PATCH 2/9] spi: spi_amd: Enable dual and quad I/O modes Raju Rangoju
2024-09-19 8:43 ` Mark Brown
2024-09-24 15:23 ` Rangoju, Raju [this message]
2024-09-18 10:50 ` [PATCH 3/9] spi: spi_amd: Replace ioread/iowrite calls Raju Rangoju
2024-09-18 10:50 ` [PATCH 4/9] spi: spi_amd: Updates to set tx/rx count functions Raju Rangoju
2024-09-18 10:50 ` [PATCH 5/9] spi: spi_amd: Optimize IO operations Raju Rangoju
2024-09-18 10:50 ` [PATCH 6/9] spi: spi_amd: Add support for HID2 SPI controller Raju Rangoju
2024-09-18 10:50 ` [PATCH 7/9] spi: spi_amd: Enhance SPI-MEM support functions Raju Rangoju
2024-09-19 8:51 ` Mark Brown
2024-09-24 15:25 ` Rangoju, Raju
2024-09-18 10:50 ` [PATCH 8/9] spi: spi_amd: Set controller address mode Raju Rangoju
2024-09-18 10:50 ` [PATCH 9/9] spi: spi_amd: Add HIDDMA basic read support Raju Rangoju
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