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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-337f4c904dbsm3631981fa.17.2025.09.02.02.41.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Sep 2025 02:41:18 -0700 (PDT) Date: Tue, 2 Sep 2025 12:41:16 +0300 From: Dmitry Baryshkov To: Yongxing Mou Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Abhinav Kumar Subject: Re: [PATCH v3 12/38] drm/msm/dp: introduce max_streams for DP controller MST support Message-ID: References: <20250825-msm-dp-mst-v3-0-01faacfcdedd@oss.qualcomm.com> <20250825-msm-dp-mst-v3-12-01faacfcdedd@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250825-msm-dp-mst-v3-12-01faacfcdedd@oss.qualcomm.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTAyMDAyNCBTYWx0ZWRfXx7QrUhLru69B 1WRfA7EU/ToOGPLb42X96jlC39u1cGTPuaBE+iUwnihkPAVFjCtY5ZXRg8HI3ySIr7Eii5Z1NfQ db5n5gBd5x4UIlrm613AnsEmGTtZFXichpUnY4vwgINmYHqEfLLBl9VXutAjiZOHkjbepxpuyz4 M3neTkGQ3Q5Qj3swLbKQnHIVzuiKHasb7vyzLudiA2wZ2rMWVS6nqHLRRG71jpMdovKENemzThw bpV7W2MJfKUB0FAeCSD/LhvKW14DQwbN5jSCVl0vOXbOeoTCfxEBnp5kGj6BI3eq7uZ7Z4Gry8L 5Q9g36vB1Nqh0SntwQEBI7GEDaw0IVP9E57V2+G4lXm/UAI/kHIYGcqklYWh8K0JEwolKNXqVud TzGN1acz X-Authority-Analysis: v=2.4 cv=WKh/XmsR c=1 sm=1 tr=0 ts=68b6bbc1 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=xqWC_Br6kY4A:10 a=kj9zAlcOel0A:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=KSwXNKDnAPCPISpuv5EA:9 a=CjuIK1q_8ugA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: TJp08efjz0P-Abiifz_Ljr8-SQbyn4JK X-Proofpoint-ORIG-GUID: TJp08efjz0P-Abiifz_Ljr8-SQbyn4JK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-02_03,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 bulkscore=0 phishscore=0 adultscore=0 spamscore=0 malwarescore=0 impostorscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509020024 On Mon, Aug 25, 2025 at 10:15:58PM +0800, Yongxing Mou wrote: > From: Abhinav Kumar > > Introduce the `mst_streams` field in each DP controller descriptor to > specify the number of supported MST streams. Most platforms support 2 or > 4 MST streams, while platforms without MST support default to a single > stream (`DEFAULT_STREAM_COUNT = 1`). > > This change also accounts for platforms with asymmetric stream support, > e.g., DP0 supporting 4 streams and DP1 supporting 2. > > Signed-off-by: Abhinav Kumar > Signed-off-by: Yongxing Mou > --- > drivers/gpu/drm/msm/dp/dp_display.c | 21 +++++++++++++++++++++ > drivers/gpu/drm/msm/dp/dp_display.h | 1 + > 2 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index 78d932bceb581ee54116926506b1025bd159108f..a8477a0a180137f15cbb1401c3964636aa32626c 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -33,6 +33,7 @@ module_param(psr_enabled, bool, 0); > MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays"); > > #define HPD_STRING_SIZE 30 > +#define DEFAULT_STREAM_COUNT 1 > > enum { > ISR_DISCONNECTED, > @@ -52,6 +53,7 @@ struct msm_dp_display_private { > bool core_initialized; > bool phy_initialized; > bool audio_supported; > + bool mst_supported; > > struct drm_device *drm_dev; > > @@ -84,12 +86,15 @@ struct msm_dp_display_private { > > void __iomem *p0_base; > size_t p0_len; > + > + int max_stream; > }; > > struct msm_dp_desc { > phys_addr_t io_start; > unsigned int id; > bool wide_bus_supported; > + int mst_streams; > }; > > static const struct msm_dp_desc msm_dp_desc_sa8775p[] = { > @@ -1213,6 +1218,15 @@ static int msm_dp_display_get_io(struct msm_dp_display_private *display) > return 0; > } > > +int msm_dp_get_mst_max_stream(struct msm_dp *msm_dp_display) > +{ > + struct msm_dp_display_private *dp; > + > + dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); > + > + return dp->max_stream; > +} > + > static int msm_dp_display_probe(struct platform_device *pdev) > { > int rc = 0; > @@ -1239,6 +1253,13 @@ static int msm_dp_display_probe(struct platform_device *pdev) > dp->msm_dp_display.is_edp = > (dp->msm_dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); > dp->hpd_isr_status = 0; > + dp->max_stream = DEFAULT_STREAM_COUNT; > + dp->mst_supported = FALSE; > + > + if (desc->mst_streams > DEFAULT_STREAM_COUNT) { > + dp->max_stream = desc->mst_streams; We should keep compatibility with earlier DT files which didn't define enough stream clocks for DP MST case. Please check how many stream clocks are actually present in the DT and set max_stream accordingly. > + dp->mst_supported = TRUE; > + } > > rc = msm_dp_display_get_io(dp); > if (rc) > diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h > index 37c6e87db90ce951274cdae61f26d76dc9ef3840..7727cf325a89b4892d2370a5616c4fa76fc88485 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.h > +++ b/drivers/gpu/drm/msm/dp/dp_display.h > @@ -29,6 +29,7 @@ struct msm_dp { > bool psr_supported; > }; > > +int msm_dp_get_mst_max_stream(struct msm_dp *msm_dp_display); > int msm_dp_display_get_modes(struct msm_dp *msm_dp_display); > bool msm_dp_display_check_video_test(struct msm_dp *msm_dp_display); > int msm_dp_display_get_test_bpp(struct msm_dp *msm_dp_display); > > -- > 2.34.1 > -- With best wishes Dmitry