From: ebiederm@xmission.com (Eric W. Biederman)
To: "Michael S. Tsirkin" <mst@dev.mellanox.co.il>
Cc: Roland Dreier <rdreier@cisco.com>, Andi Kleen <ak@suse.de>,
linux-kernel@vger.kernel.org,
Jack Morgenstein <jackm@mellanox.co.il>
Subject: Re: pgprot_writecombine() and PATs on x86
Date: Thu, 26 Apr 2007 00:13:44 -0600 [thread overview]
Message-ID: <m1647joe7b.fsf@ebiederm.dsl.xmission.com> (raw)
In-Reply-To: <20070426054333.GN5217@mellanox.co.il> (Michael S. Tsirkin's message of "Thu, 26 Apr 2007 08:43:33 +0300")
"Michael S. Tsirkin" <mst@dev.mellanox.co.il> writes:
>> So in general the pci prefetchable attribute means write-combining as
>> well as prefetching is safe. A sane BIOS will allocate prefetchable
>> BARS contiguously in the address space. So on a good day you
>> can just use one MTRR to map all of the prefetchable BARs as write-combining.
>
> Good point, and sounds easy enough.
> So why does not linux do it automatically then where possible?
It does when we have support in the page tables. The MTRRs appear
to complex to use automatically. Getting the all of the memory
set to write-back using the can be a chore. If things were truly
straight forward every BIOS would setup write-combining automatically.
> There are sure to be some broken devices, but if some device
> can't live with WC, we can always disable WC system-wide.
Yes.
Eric
next prev parent reply other threads:[~2007-04-26 6:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-04-25 18:02 pgprot_writecombine() and PATs on x86 Roland Dreier
2007-04-25 18:19 ` Andi Kleen
2007-04-25 18:31 ` Eric W. Biederman
2007-04-25 18:35 ` Roland Dreier
2007-04-25 18:45 ` Eric W. Biederman
2007-04-26 5:43 ` Michael S. Tsirkin
2007-04-26 6:13 ` Eric W. Biederman [this message]
2007-04-25 18:33 ` Roland Dreier
2007-04-25 18:41 ` Dave Jones
2007-04-25 19:10 ` Andi Kleen
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