Re: [PATCH 2/2] Initial generic hypertransport interrupt support.

Benjamin Herrenschmidt
2006-07-10T22:39:40Z

On Mon, 2006-07-10 at 16:26 -0600, Eric W. Biederman wrote:
> This patch implements two functions ht_create_irq and ht_destroy_irq
> for use by drivers. Several other functions are implemented as helpers
> for arch specific irq_chip handlers.
>
> The driver for the card I tested this on isn't yet ready to be merged.
> However this code is and hypertransport irqs are in use in a few other
> places in the kernel. Not that any of this will get merged before
> 2.6.19
>
> Because the ipath-ht400 is slightly out of spec this code will need
> to be generalized to work there.
>
> I think all of the powerpc uses are for a plain interrupt controller
> in a chipset so support for native hypertransport devices is a little
> less interesting.

At this point, the only PPCs with HT interrupts that I know are 970
based solutions using the Apple U3/U4 bridges (and their IBM
counterparts). Thus all HT interrupts are routed to the MPIC as sources,
so things like masking, affinity, etc... are all handled at the MPIC
level, not at the HT level and they all originate from either an Apple
home made HT APIC or standard HT APICs in PCI-X/E tunnels. We still need
to poke around with the HT APICs for configuration and EOI on level
interrupts (due to a bug in the Apple MPIC, the EOI doesn't get sent
back to the HT APIC) but we have code locally in the MPIC driver to do
it and I don't think it would fit well a generic layer.

Things might be different in the future... but for now, I'm afraid I
have no use of that HT layer.

Cheers
Ben.