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From: ebiederm@xmission.com (Eric W. Biederman)
To: Mike Travis <travis@sgi.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>, Ingo Molnar <mingo@elte.hu>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Eric W. Biederman" <ebiederm@xmission.com>,
	Dhaval Giani <dhaval@linux.vnet.ibm.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/04] x86: add get_irq_cfg in io_apic_64.c
Date: Mon, 04 Aug 2008 12:43:01 -0700	[thread overview]
Message-ID: <m1k5ew4ldm.fsf@frodo.ebiederm.org> (raw)
In-Reply-To: <48971A1E.5040704@sgi.com> (Mike Travis's message of "Mon, 04 Aug 2008 08:02:54 -0700")

Mike Travis <travis@sgi.com> writes:


>> arch/x86/kernel/io_apic_64.c | 181 +++++++++++++++++++++++++++++++++----------
>>  1 file changed, 141 insertions(+), 40 deletions(-)
>> 
>> Index: linux-2.6/arch/x86/kernel/io_apic_64.c
>> ===================================================================
>> --- linux-2.6.orig/arch/x86/kernel/io_apic_64.c
>> +++ linux-2.6/arch/x86/kernel/io_apic_64.c
>> @@ -57,7 +57,11 @@
>>  
>>  #define __apicdebuginit(type) static type __init
>>  
>> +struct irq_cfg;
>> +
>>  struct irq_cfg {
>> +	unsigned int irq;
>> +	struct irq_cfg *next;
>>  	cpumask_t domain;
>>  	cpumask_t old_domain;
>         ^^^^^^^^^
> One thought here... most interrupts cannot be serviced by any cpu in
> the system, but instead need to be serviced by the cpu attached to
> the ioapic or on the local node.  So defining some subset of cpumask_t
> would save a lot of space.  For example:
>
> 	nodecpumask_t {
> 		int	node;
> 		DEFINE_BITMAP(..., MAX_CPUS_PER_NODE);
> 	};
>
> And of course, providing some utilities to convert nodecpumask_t <==>
> cpumask_t.
>
> ("node" might not be the proper abstraction... maybe "irqcpumask_t"?

I agree this is someplace we could optimize.  In practice we seem
to have 3 choices on x86.

1) A single cpu.
2) lowest priority interrupt delivery to a set of possibly 8 cpus.
3) A class of interrupt that is delivered locally to each individual
   cpu.

If you have a true NUMA system it should still be possible to handle
interrupts on the wrong Node just prohibitively expensive.

Eric

      parent reply	other threads:[~2008-08-04 19:53 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-08-04 10:09 [PATCH 00/04] dyn_array and nr_irqs support v3 -- addon Yinghai Lu
2008-08-04 10:09 ` [PATCH 01/04] x86_64: use get_irq_desc together with dyn_array Yinghai Lu
2008-08-04 10:09   ` [PATCH 02/04] x86: add get_irq_cfg in io_apic_64.c Yinghai Lu
2008-08-04 10:10     ` [PATCH 03/04] x86: put timer_rand_state pointer into irq_desc Yinghai Lu
2008-08-04 10:10       ` [PATCH 04/04] x86: put irq_2_pin pointer into irq_cfg - 64bit Yinghai Lu
2008-08-04 15:02     ` [PATCH 02/04] x86: add get_irq_cfg in io_apic_64.c Mike Travis
2008-08-04 18:12       ` Yinghai Lu
2008-08-04 20:27         ` Mike Travis
2008-08-04 19:43       ` Eric W. Biederman [this message]

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