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To: Arjan van de Ven <arjanv@redhat.com>
Cc: "Martin J. Bligh" <mbligh@aracnet.com>,
       "Nakajima, Jun" <jun.nakajima@intel.com>,
       Jeff Garzik <jgarzik@pobox.com>, Andrew Morton <akpm@osdl.org>,
       Anton Blanchard <anton@samba.org>, linux-kernel@vger.kernel.org
Subject: Re: CONFIG_IRQBALANCE for AMD64?
References: <7F740D512C7C1046AB53446D372001730182BB40@scsmsx402.amr.corp.intel.com>
	<2750000.1085769212@flay>
	<20040528184411.GE9898@devserv.devel.redhat.com>
From: michael@optusnet.com.au
Date: 29 May 2004 18:41:46 +1000
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Arjan van de Ven <arjanv@redhat.com> writes:
> On Fri, May 28, 2004 at 11:33:32AM -0700, Martin J. Bligh wrote:
[...]
> > Also, we may well have more than 1 CPU's worth of traffic to
> > process in a large network server.
> 
> One NIC? I've yet to see that ;)

Oh, and another corner case. 

Say you have a cpu-bound process on an SMP box.
Say you're also using a large chunk of a CPU processing
interrupts from a single IRQ.

What stops the cpu-bound process being scheduled onto
the same CPU as the interrupt handlers?

Now you've got one idle CPU, and one seriously overloaded
CPU.

Michael.