Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this

[Jan Rychter <jan@rychter.com>]

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> I'd appreciate if folks would run the program below on various
> machines, especially those whose caches aren't automatically coherent
> at the hardware level.
> 
> It searches for that address multiple which an application can use to
> get coherent multiple mappings of shared memory, with good performance.

From a Sharp Zaurus C-760. Not very interesting, I'm afraid:

Test separation: 4096 bytes: FAIL - too slow
Test separation: 8192 bytes: FAIL - too slow
Test separation: 16384 bytes: FAIL - too slow
Test separation: 32768 bytes: FAIL - too slow
Test separation: 65536 bytes: FAIL - too slow
Test separation: 131072 bytes: FAIL - too slow
Test separation: 262144 bytes: FAIL - too slow
Test separation: 524288 bytes: FAIL - too slow
Test separation: 1048576 bytes: FAIL - too slow
Test separation: 2097152 bytes: FAIL - too slow
Test separation: 4194304 bytes: FAIL - too slow
Test separation: 8388608 bytes: FAIL - too slow
Test separation: 16777216 bytes: FAIL - too slow
VM page alias coherency test: failed; will use copy buffers instead


Processor	: Intel XScale-PXA255 rev 6 (v5l)
BogoMIPS	: 397.31
Features	: swp half thumb fastmult edsp 
CPU implementor	: 0x69
CPU architecture: 5TE
CPU variant	: 0x0
CPU part	: 0x2d0
CPU revision	: 6
Cache type	: undefined 5
Cache clean	: undefined 5
Cache lockdown	: undefined 5
Cache unified	: harvard
I size		: 16384
I assoc		: 16
I line length	: 32
I sets		: 32
D size		: 16384
D assoc		: 16
D line length	: 32
D sets		: 32

Hardware	: SHARP Shepherd
Revision	: 0000
Serial		: 0000000000000000

--J.

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