From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753569AbcFJWIm (ORCPT ); Fri, 10 Jun 2016 18:08:42 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:32818 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932553AbcFJWIi (ORCPT ); Fri, 10 Jun 2016 18:08:38 -0400 From: Kevin Hilman To: Jon Hunter Cc: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Stephen Warren , Thierry Reding , Geert Uytterhoeven , Grygorii Strashko , Lars-Peter Clausen , Linus Walleij , , , Subject: Re: [PATCH V6 4/9] genirq: Add runtime power management support for IRQ chips Organization: BayLibre References: <1465312354-27778-1-git-send-email-jonathanh@nvidia.com> <1465312354-27778-5-git-send-email-jonathanh@nvidia.com> Date: Fri, 10 Jun 2016 15:08:30 -0700 In-Reply-To: <1465312354-27778-5-git-send-email-jonathanh@nvidia.com> (Jon Hunter's message of "Tue, 7 Jun 2016 16:12:29 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (darwin) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jon Hunter writes: > Some IRQ chips may be located in a power domain outside of the CPU > subsystem and hence will require device specific runtime power > management. In order to support such IRQ chips, add a pointer for a > device structure to the irq_chip structure, and if this pointer is > populated by the IRQ chip driver and CONFIG_PM is selected in the kernel > configuration, then the pm_runtime_get/put APIs for this chip will be > called when an IRQ is requested/freed, respectively. > > Signed-off-by: Jon Hunter Reviewed-by: Kevin Hilman