Re: CPU/cache detection wrong

Alexander Hoogerhuis
2002-09-30T17:38:12Z

Alan Cox <alan@lxorguk.ukuu.org.uk> writes:

> On Sat, 2002-09-28 at 13:29, Alexander Hoogerhuis wrote:
> > CPU: Intel(R) Pentium(R) 4 Mobile CPU 1.70GHz stepping 04
> > Enabling fast FPU save and restore... done.
> > Enabling unmasked SIMD FPU exception support... done.
> > Checking 'hlt' instruction... OK.
> >
> > The machine is a Comapq Evo n800c with a 1.7GHz P4-M in it, and
> > according to the BIOS I've got 16kb/512Kb L1/L2-cache. Accroding to
> > the 2.4.20-pre7-ac3-kernel. It's been like this at least since
> > 2.4.19-pre4 or so.
>
> Can you stick a printk in arch/i386/kernel/setup.c in the function
> init_intel
>
> Just before:
> /* look up this descriptor in the table */
>
> stick
>
> printk("Cache info byte: %02X\n", des);
>
> that will dump the cache info out of the CPU as the kernel scans it and
> should let us find the error in the table.
>

And the jury says:

PU: Before vendor init, caps: 3febf9ff 00000000 00000000, vendor = 0
Cache info byte: 50
Cache info byte: 5B
Cache info byte: 66
Cache info byte: 00
Cache info byte: 00
Cache info byte: 00
Cache info byte: 00
Cache info byte: 00
Cache info byte: 00
Cache info byte: 00
Cache info byte: 00
Cache info byte: 40
Cache info byte: 70
Cache info byte: 7B
Cache info byte: 00
CPU: L1 I cache: 0K, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: After vendor init, caps: 3febf9ff 00000000 00000000 00000000

Let me know if you need more info :)

mvh,
A
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Alexander Hoogerhuis | alexh@ihatent.com
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