From: Andreas Schwab <schwab@suse.de>
To: Troy Benjegerdes <troy.benjegerdes@sifive.com>
Cc: Atish Patra <atish.patra@wdc.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Palmer Dabbelt <palmer@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Olof Johansson <olof@lixom.net>,
linux-riscv@lists.infradead.org,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH] RISC-V: defconfig: enable MMC & SPI for RISC-V
Date: Thu, 27 Jun 2019 11:15:28 +0200 [thread overview]
Message-ID: <mvmlfxntmmn.fsf@suse.de> (raw)
In-Reply-To: <6D4D90AF-59F9-4523-A916-7CFAC8E43C45@sifive.com> (Troy Benjegerdes's message of "Tue, 25 Jun 2019 18:58:20 -0500")
On Jun 25 2019, Troy Benjegerdes <troy.benjegerdes@sifive.com> wrote:
> and I see this in the log
>
> [ 1.106626] m25p80 spi0.0: unrecognized JEDEC id bytes: 9d 70 19 9d 70 19
You need the patchset "mtd: spi-nor: add support for is25wp256 spi-nor
flash".
Andreas.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
next prev parent reply other threads:[~2019-06-27 9:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-25 22:56 [PATCH] RISC-V: defconfig: enable MMC & SPI for RISC-V Atish Patra
2019-06-25 23:58 ` Troy Benjegerdes
2019-06-27 9:15 ` Andreas Schwab [this message]
2019-06-26 7:58 ` Palmer Dabbelt
2019-06-26 16:00 ` Paul Walmsley
2019-06-26 17:19 ` Atish Patra
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