From: Andi Kleen <ak@suse.de>
To: "Bela Lubkin" <blubkin@vmware.com>
Cc: linux-kernel@vger.kernel.org, mingo@elte.hu
Subject: Re: touch_cache() only touches two thirds
Date: 10 Nov 2006 09:25:51 +0100 [thread overview]
Message-ID: <p734pt7k8s0.fsf@bingen.suse.de> (raw)
In-Reply-To: <FE74AC4E0A23124DA52B99F17F441597DA118C@PA-EXCH03.vmware.com>
"Bela Lubkin" <blubkin@vmware.com> writes:
>
> /*
> * Dirty a big buffer in a hard-to-predict (for the L2 cache) way. This
> * is the operation that is timed, so we try to generate unpredictable
> * cachemisses that still end up filling the L2 cache:
> */
The comment is misleading anyways. AFAIK several of the modern
CPUs (at least K8, later P4s, Core2, POWER4+, PPC970) have prefetch
predictors advanced enough to follow several streams forward and backwards
in parallel.
I hit this while doing NUMA benchmarking for example.
Most likely to be really unpredictable you need to use a
true RND and somehow make sure still the full cache range
is covered.
-Andi
next prev parent reply other threads:[~2006-11-10 8:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-09 0:56 touch_cache() only touches two thirds Bela Lubkin
2006-11-10 8:25 ` Andi Kleen [this message]
2006-11-11 0:12 ` Bela Lubkin
2006-11-11 0:23 ` Andi Kleen
2006-11-11 1:48 ` Bela Lubkin
2006-11-18 4:18 ` dean gaudet
2006-11-18 4:31 ` dean gaudet
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