From: Andi Kleen <ak@suse.de>
To: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: zach@vmware.com, torvalds@osdl.org
Subject: Re: [PATCH] x86/PAE: Fix pte_clear for the >4GB RAM case
Date: 28 Apr 2006 07:18:27 +0200 [thread overview]
Message-ID: <p73mze66zx8.fsf@bragg.suse.de> (raw)
In-Reply-To: <200604272001.k3RK1dmX007637@hera.kernel.org>
Linux Kernel Mailing List <linux-kernel@vger.kernel.org> writes:
> +/*
> + * For PTEs and PDEs, we must clear the P-bit first when clearing a page table
> + * entry, so clear the bottom half first and enforce ordering with a compiler
> + * barrier.
> + */
> +static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
> +{
> + ptep->pte_low = 0;
> + smp_wmb();
> + ptep->pte_high = 0;
> +}
> +
> +static inline void pmd_clear(pmd_t *pmd)
> +{
> + u32 *tmp = (u32 *)pmd;
> + *tmp = 0;
> + smp_wmb();
> + *(tmp + 1) = 0;
> +}
I think that's still wrong - it should be wmb() not smp_wmb because this
problem can happen on a UP kernel already.
-Andi
next parent reply other threads:[~2006-04-28 5:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <200604272001.k3RK1dmX007637@hera.kernel.org>
2006-04-28 5:18 ` Andi Kleen [this message]
2006-04-28 5:23 ` [PATCH] x86/PAE: Fix pte_clear for the >4GB RAM case Chris Wright
2006-04-28 6:08 ` Andi Kleen
2006-04-28 6:27 ` Chris Wright
2006-04-28 6:29 ` Andi Kleen
2006-04-28 7:20 ` Nick Piggin
2006-04-28 14:54 ` Linus Torvalds
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