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To: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: zach@vmware.com, torvalds@osdl.org
Subject: Re: [PATCH] x86/PAE: Fix pte_clear for the >4GB RAM case
References: <200604272001.k3RK1dmX007637@hera.kernel.org>
From: Andi Kleen <ak@suse.de>
Date: 28 Apr 2006 07:18:27 +0200
In-Reply-To: <200604272001.k3RK1dmX007637@hera.kernel.org>
Message-ID: <p73mze66zx8.fsf@bragg.suse.de>
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Linux Kernel Mailing List <linux-kernel@vger.kernel.org> writes:
> +/*
> + * For PTEs and PDEs, we must clear the P-bit first when clearing a page table
> + * entry, so clear the bottom half first and enforce ordering with a compiler
> + * barrier.
> + */
> +static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
> +{
> +	ptep->pte_low = 0;
> +	smp_wmb();
> +	ptep->pte_high = 0;
> +}
> +
> +static inline void pmd_clear(pmd_t *pmd)
> +{
> +	u32 *tmp = (u32 *)pmd;
> +	*tmp = 0;
> +	smp_wmb();
> +	*(tmp + 1) = 0;
> +}

I think that's still wrong - it should be wmb() not smp_wmb because this
problem can happen on a UP kernel already.

-Andi