Re: FW: cmpxchg hard lockup on AMD64 - ASUS(A8V-MX)

[Andi Kleen <ak@suse.de>]

"chaitanya Huilgol" <chaitanya@tidaldata.com> writes:


> {
>         __asm__ __volatile__ (
>                 "# LFPUSH \n\t"
>                 "1:\t"
>                 "movl %2, (%1) \n"
>                 LOCK "cmpxchg %1, %0 \n\t"
>                 "jnz 1b \n\t"
>                 :
>                 :"m" (*lf), "r" (cl), "a" (lf->top)

You don't tell gcc *lf is modified.

>                 );
> }
> 
> cell* pop (lifo * lf)
> {
>         cell* v=0;
>         __asm__ __volatile__ (
>                 "# LFPOP \n\t"
>                 "testl %%eax, %%eax \n\t"
>                 "jz 20f \n"
>                 "10:\t"
>                 "movl (%%eax), %%ebx \n\t"
>                 "movl %%edx, %%ecx \n\t"
>                 "incl %%ecx \n\t"

Nothing uses the incremented %ecx

>                 LOCK "cmpxchg8b %1 \n\t"
>                 "jz 20f \n\t"
>                 "testl %%eax, %%eax \n\t"
>                 "jnz 10b \n"
>                 "20:\t"
>                 :"=a" (v)
>                 :"m" (*lf),


And you don't tell *lf is modified again.

It could be just a miscompilation caused by your wrong asm constraints.

-Andi