* FW: cmpxchg hard lockup on AMD64 - ASUS(A8V-MX)
@ 2006-05-22 7:59 chaitanya Huilgol
2006-05-22 11:12 ` Andi Kleen
0 siblings, 1 reply; 2+ messages in thread
From: chaitanya Huilgol @ 2006-05-22 7:59 UTC (permalink / raw)
To: linux-kernel
I am seeing a hard lockup when the lock-free lifo
implementation below is run on a AMD Athlon 64
and ASUS A8V-MX motherboard. GCC version is
gcc version 3.2.3 20030502 (Red Hat Linux 3.2.3-47.fc4)
I have run this code on Pentiums without any issue
till now. Also the same code works fine in userland.
I fail to understand as to why the problem occurs
only in kernel mode.
Thanks,
Chaitanya
http://lalists.stanford.edu/lad/2000/Jul/0319.html
#ifdef __SMP__
#define LOCK "lock ; "
#else
#define LOCK ""
#endif
typedef struct cell {
struct cell* link; /* next cell in the lifo */
/*...*/ /* any data here */
} cell;
typedef struct lifo {
volatile cell* top; /* top of the stack */
volatile unsigned long cnt; /* used to avoid ABA problem */
} lifo;
void init(lifo* lf)
{
lf->top = 0;
lf->cnt = 0;
}
void push (lifo * lf, cell * cl)
{
__asm__ __volatile__ (
"# LFPUSH \n\t"
"1:\t"
"movl %2, (%1) \n"
LOCK "cmpxchg %1, %0 \n\t"
"jnz 1b \n\t"
:
:"m" (*lf), "r" (cl), "a" (lf->top)
);
}
cell* pop (lifo * lf)
{
cell* v=0;
__asm__ __volatile__ (
"# LFPOP \n\t"
"testl %%eax, %%eax \n\t"
"jz 20f \n"
"10:\t"
"movl (%%eax), %%ebx \n\t"
"movl %%edx, %%ecx \n\t"
"incl %%ecx \n\t"
LOCK "cmpxchg8b %1 \n\t"
"jz 20f \n\t"
"testl %%eax, %%eax \n\t"
"jnz 10b \n"
"20:\t"
:"=a" (v)
:"m" (*lf), "a" (lf->top), "d" (lf->cnt)
:"ecx", "ebx" );
return v;
}
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: FW: cmpxchg hard lockup on AMD64 - ASUS(A8V-MX)
2006-05-22 7:59 FW: cmpxchg hard lockup on AMD64 - ASUS(A8V-MX) chaitanya Huilgol
@ 2006-05-22 11:12 ` Andi Kleen
0 siblings, 0 replies; 2+ messages in thread
From: Andi Kleen @ 2006-05-22 11:12 UTC (permalink / raw)
To: chaitanya Huilgol; +Cc: linux-kernel
"chaitanya Huilgol" <chaitanya@tidaldata.com> writes:
> {
> __asm__ __volatile__ (
> "# LFPUSH \n\t"
> "1:\t"
> "movl %2, (%1) \n"
> LOCK "cmpxchg %1, %0 \n\t"
> "jnz 1b \n\t"
> :
> :"m" (*lf), "r" (cl), "a" (lf->top)
You don't tell gcc *lf is modified.
> );
> }
>
> cell* pop (lifo * lf)
> {
> cell* v=0;
> __asm__ __volatile__ (
> "# LFPOP \n\t"
> "testl %%eax, %%eax \n\t"
> "jz 20f \n"
> "10:\t"
> "movl (%%eax), %%ebx \n\t"
> "movl %%edx, %%ecx \n\t"
> "incl %%ecx \n\t"
Nothing uses the incremented %ecx
> LOCK "cmpxchg8b %1 \n\t"
> "jz 20f \n\t"
> "testl %%eax, %%eax \n\t"
> "jnz 10b \n"
> "20:\t"
> :"=a" (v)
> :"m" (*lf),
And you don't tell *lf is modified again.
It could be just a miscompilation caused by your wrong asm constraints.
-Andi
^ permalink raw reply [flat|nested] 2+ messages in thread
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2006-05-22 11:12 ` Andi Kleen
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