public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Cc: andersson@kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	cros-qcom-dts-watchers@chromium.org,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	quic_vbadigan@quicinc.com, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/6] dt-bindings: PCI: Add binding for qps615
Date: Wed, 20 Nov 2024 09:04:51 +0100	[thread overview]
Message-ID: <poruhxgxnkhvqij5q7z4toxzcsk2gvkyj6ewicsfxj6xl3i3un@msgyeeyb6hsf> (raw)
In-Reply-To: <20241112-qps615_pwr-v3-1-29a1e98aa2b0@quicinc.com>

On Tue, Nov 12, 2024 at 08:31:33PM +0530, Krishna chaitanya chundru wrote:
> Add binding describing the Qualcomm PCIe switch, QPS615,
> which provides Ethernet MAC integrated to the 3rd downstream port
> and two downstream PCIe ports.
> 
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
>  .../devicetree/bindings/pci/qcom,qps615.yaml       | 205 +++++++++++++++++++++
>  1 file changed, 205 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,qps615.yaml b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml
> new file mode 100644
> index 000000000000..e6a63a0bb0f3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml

Isn't "qcom,qps615" a SoC name? This is supposed to be matching
compatible, in your case probably qcom,qps615-whatever-this-is?

...

> +  qps615,axi-clk-freq-hz:

That's a downstream code you send us.

Anyway, why assigned clock rates do not work for you? You are
re-implementing legacy property now under different name :/


> +    description:
> +      AXI clock rate which is internal bus of the switch
> +      The switch only runs in two frequencies i.e 250MHz and 125MHz.
> +    enum: [125000000, 250000000]
> +
> +allOf:
> +  - $ref: "#/$defs/qps615-node"
> +
> +patternProperties:
> +  "@1?[0-9a-f](,[0-7])?$":
> +    description: child nodes describing the internal downstream ports
> +      the qps615 switch.
> +    type: object
> +    $ref: "#/$defs/qps615-node"
> +    unevaluatedProperties: false
> +
> +$defs:
> +  qps615-node:
> +    type: object
> +
> +    properties:
> +      qcom,l0s-entry-delay-ns:
> +        description: Aspm l0s entry delay.
> +
> +      qcom,l1-entry-delay-ns:
> +        description: Aspm l1 entry delay.
> +
> +      qcom,tx-amplitude-millivolt:

-microvolt does not work for you?

> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        description: Change Tx Margin setting for low power consumption.
> +
> +      qcom,no-dfe-support:
> +        type: boolean
> +        description: Disable DFE (Decision Feedback Equalizer), which mitigates
> +          intersymbol interference and some reflections caused by impedance mismatches.
> +
> +      qcom,nfts:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        description:
> +          Number of Fast Training Sequence (FTS) used during L0s to L0 exit
> +          for bit and Symbol lock.

Use some of these properties in the example. I saw only one.

> +
> +    allOf:
> +      - $ref: /schemas/pci/pci-bus.yaml#
> +
> +unevaluatedProperties: false
> +
> +required:
> +  - vdd18-supply
> +  - vdd09-supply
> +  - vddc-supply
> +  - vddio1-supply
> +  - vddio2-supply
> +  - vddio18-supply
> +  - i2c-parent
> +  - reset-gpios
> +
> +examples:
> +  - |
> +

Drop blank line

> +    #include <dt-bindings/gpio/gpio.h>
> +
> +    pcie {
> +        #address-cells = <3>;
> +        #size-cells = <2>;
> +
> +        pcie@0 {
> +            device_type = "pci";
> +            reg = <0x0 0x0 0x0 0x0 0x0>;

Best regards,
Krzysztof


  parent reply	other threads:[~2024-11-20  8:04 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-12 15:01 [PATCH v3 0/6] PCI: Enable Power and configure the QPS615 PCIe switch Krishna chaitanya chundru
2024-11-12 15:01 ` [PATCH v3 1/6] dt-bindings: PCI: Add binding for qps615 Krishna chaitanya chundru
2024-11-12 15:49   ` Bjorn Andersson
2024-11-15 16:18   ` Rob Herring
2024-11-20  8:04   ` Krzysztof Kozlowski [this message]
2024-11-12 15:01 ` [PATCH v3 2/6] arm64: dts: qcom: qcs6490-rb3gen2: Add node " Krishna chaitanya chundru
2024-11-12 15:49   ` Bjorn Andersson
2024-11-15 11:45   ` Manivannan Sadhasivam
2024-11-20  8:06   ` Krzysztof Kozlowski
2024-11-20 11:03     ` Dmitry Baryshkov
2024-11-12 15:01 ` [PATCH v3 3/6] PCI: Add new start_link() & stop_link function ops Krishna chaitanya chundru
2024-11-12 23:41   ` Bjorn Helgaas
2024-11-13  8:41     ` Krishna Chaitanya Chundru
2024-11-15 11:51     ` Manivannan Sadhasivam
2024-11-12 15:01 ` [PATCH v3 4/6] PCI: dwc: Add support for new pci function op Krishna chaitanya chundru
2024-11-12 23:32   ` Bjorn Helgaas
2024-11-12 15:01 ` [PATCH v3 5/6] PCI: qcom: Add support for host_stop_link() & host_start_link() Krishna chaitanya chundru
2024-11-12 23:36   ` Bjorn Helgaas
2024-11-15 11:57   ` Manivannan Sadhasivam
2024-11-12 15:01 ` [PATCH v3 6/6] PCI: pwrctl: Add power control driver for qps615 Krishna chaitanya chundru
2024-11-12 15:51   ` Bjorn Andersson
2024-11-12 23:21     ` Bjorn Andersson
2024-11-13 13:38   ` Bartosz Golaszewski
2024-11-15 12:25   ` Manivannan Sadhasivam

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=poruhxgxnkhvqij5q7z4toxzcsk2gvkyj6ewicsfxj6xl3i3un@msgyeeyb6hsf \
    --to=krzk@kernel.org \
    --cc=andersson@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=brgl@bgdev.pl \
    --cc=conor+dt@kernel.org \
    --cc=cros-qcom-dts-watchers@chromium.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jingoohan1@gmail.com \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=quic_krichai@quicinc.com \
    --cc=quic_vbadigan@quicinc.com \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox