From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757281AbcGJSMH (ORCPT ); Sun, 10 Jul 2016 14:12:07 -0400 Received: from terminus.zytor.com ([198.137.202.10]:53564 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755293AbcGJSMF (ORCPT ); Sun, 10 Jul 2016 14:12:05 -0400 Date: Sun, 10 Jul 2016 11:11:36 -0700 From: tip-bot for Len Brown Message-ID: Cc: hpa@zytor.com, tglx@linutronix.de, torvalds@linux-foundation.org, len.brown@intel.com, linux-kernel@vger.kernel.org, peterz@infradead.org, stephane.gasparini@intel.com, mingo@kernel.org Reply-To: tglx@linutronix.de, hpa@zytor.com, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, len.brown@intel.com, peterz@infradead.org, stephane.gasparini@intel.com, mingo@kernel.org In-Reply-To: <5d7561655dfb066ff10801b423405bae4d1cfbe2.1466138954.git.len.brown@intel.com> References: <5d7561655dfb066ff10801b423405bae4d1cfbe2.1466138954.git.len.brown@intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/timers] x86/tsc_msr: Correct Silvermont reference clock values Git-Commit-ID: 05680e7fa8a4e700e031a5e72cd8c18265f0031a X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 05680e7fa8a4e700e031a5e72cd8c18265f0031a Gitweb: http://git.kernel.org/tip/05680e7fa8a4e700e031a5e72cd8c18265f0031a Author: Len Brown AuthorDate: Fri, 17 Jun 2016 01:22:47 -0400 Committer: Ingo Molnar CommitDate: Sun, 10 Jul 2016 17:00:13 +0200 x86/tsc_msr: Correct Silvermont reference clock values Atom processors use a 19.2 MHz crystal oscillator. Early processors generate 100 MHz via 19.2 MHz * 26 / 5 = 99.84 MHz. Later preocessor generate 100 MHz via 19.2 MHz * 125 / 24 = 100 MHz. Update the Silvermont-based tables accordingly, matching the Software Developers Manual. Also, correct a 166 MHz entry that should have been 116 MHz, and add a missing 80 MHz entry. Reported-by: Stephane Gasparini Signed-off-by: Len Brown Reviewed-by: Thomas Gleixner Cc: Linus Torvalds Cc: Peter Zijlstra Link: http://lkml.kernel.org/r/5d7561655dfb066ff10801b423405bae4d1cfbe2.1466138954.git.len.brown@intel.com Signed-off-by: Ingo Molnar --- arch/x86/kernel/tsc_msr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 4110f72..20487e2 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -35,11 +35,11 @@ static struct freq_desc freq_desc_tables[] = { /* CLV+ */ { 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } }, /* TNG - Intel Atom processor Z3400 series */ - { 6, 0x4a, 1, { 0, 99840, 133200, 0, 0, 0, 0, 0 } }, + { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } }, /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */ - { 6, 0x37, 1, { 83200, 99840, 133200, 166400, 0, 0, 0, 0 } }, + { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } }, /* ANN - Intel Atom processor Z3500 series */ - { 6, 0x5a, 1, { 83200, 99840, 133200, 99840, 0, 0, 0, 0 } }, + { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } }, }; static int match_cpu(u8 family, u8 model)