From: tip-bot for Cyrill Gorcunov <gorcunov@openvz.org>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
gorcunov@openvz.org, tglx@linutronix.de, mingo@elte.hu
Subject: [tip:x86/apic] x86: apic - introduce dummy apic operations
Date: Sun, 12 Apr 2009 17:57:57 GMT [thread overview]
Message-ID: <tip-08306ce61d6848e6fbf74fa4cc693c3fb29e943f@git.kernel.org> (raw)
In-Reply-To: <20090412165058.724788431@openvz.org>
Commit-ID: 08306ce61d6848e6fbf74fa4cc693c3fb29e943f
Gitweb: http://git.kernel.org/tip/08306ce61d6848e6fbf74fa4cc693c3fb29e943f
Author: Cyrill Gorcunov <gorcunov@openvz.org>
AuthorDate: Sun, 12 Apr 2009 20:47:41 +0400
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Sun, 12 Apr 2009 19:23:53 +0200
x86: apic - introduce dummy apic operations
Impact: refactor, speed up and robustize code
In case if apic was disabled by kernel option
or by hardware limits we can use dummy operations
in apic->write to simplify the ack_APIC_irq() code.
At the lame time the patch fixes the missed EOI in
do_IRQ function (which has place if kernel is compiled
as X86-32 and interrupt without handler happens where
apic was not asked to be disabled via kernel option).
Note that native_apic_write_dummy() consists of
WARN_ON_ONCE to catch any buggy writes on enabled
APICs. Could be removed after some time of testing.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
LKML-Reference: <20090412165058.724788431@openvz.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/include/asm/apic.h | 3 ++-
arch/x86/kernel/apic/apic.c | 24 ++++++++++++++++++++++++
arch/x86/kernel/irq.c | 10 ++--------
3 files changed, 28 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 42f2f83..2bd5a46 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -212,6 +212,7 @@ static inline void ack_x2APIC_irq(void)
}
#endif
+extern void apic_disable(void);
extern int lapic_get_maxlvt(void);
extern void clear_local_APIC(void);
extern void connect_bsp_APIC(void);
@@ -252,7 +253,7 @@ static inline void lapic_shutdown(void) { }
#define local_apic_timer_c2_ok 1
static inline void init_apic_mappings(void) { }
static inline void disable_local_APIC(void) { }
-
+static inline void apic_disable(void) { }
#endif /* !CONFIG_X86_LOCAL_APIC */
#ifdef CONFIG_X86_64
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index c3be10f..9b849d4 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -232,6 +232,24 @@ static int modern_apic(void)
return lapic_get_version() >= 0x14;
}
+/*
+ * bare function to substitute write operation
+ * and it's _that_ fast :)
+ */
+void native_apic_write_dummy(u32 reg, u32 v)
+{
+ WARN_ON_ONCE((cpu_has_apic || !disable_apic));
+}
+
+/*
+ * right after this call apic->write doesn't do anything
+ * note that there is no restore operation it works one way
+ */
+void apic_disable(void)
+{
+ apic->write = native_apic_write_dummy;
+}
+
void native_apic_wait_icr_idle(void)
{
while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
@@ -1582,6 +1600,12 @@ void __init init_apic_mappings(void)
*/
if (boot_cpu_physical_apicid == -1U)
boot_cpu_physical_apicid = read_apic_id();
+
+ /* lets check if we may to NOP'ify apic operations */
+ if (!cpu_has_apic) {
+ pr_info("APIC: disable apic facility\n");
+ apic_disable();
+ }
}
/*
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 6603492..fd57bf3 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -27,7 +27,6 @@ void ack_bad_irq(unsigned int irq)
if (printk_ratelimit())
pr_err("unexpected IRQ trap at vector %02x\n", irq);
-#ifdef CONFIG_X86_LOCAL_APIC
/*
* Currently unexpected vectors happen only on SMP and APIC.
* We _must_ ack these because every local APIC has only N
@@ -37,9 +36,7 @@ void ack_bad_irq(unsigned int irq)
* completely.
* But only ack when the APIC is enabled -AK
*/
- if (cpu_has_apic)
- ack_APIC_irq();
-#endif
+ ack_APIC_irq();
}
#define irq_stats(x) (&per_cpu(irq_stat, x))
@@ -214,10 +211,7 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
irq = __get_cpu_var(vector_irq)[vector];
if (!handle_irq(irq, regs)) {
-#ifdef CONFIG_X86_64
- if (!disable_apic)
- ack_APIC_irq();
-#endif
+ ack_APIC_irq();
if (printk_ratelimit())
pr_emerg("%s: %d.%d No irq handler for vector (irq %d)\n",
next prev parent reply other threads:[~2009-04-12 17:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-12 16:47 [rfc 0/4] x86 - apic dummy ops with cleanups Cyrill Gorcunov
2009-04-12 16:47 ` [rfc 1/4] x86: irq.c - tiny cleanup Cyrill Gorcunov
2009-04-12 17:25 ` Ingo Molnar
2009-04-12 17:53 ` Cyrill Gorcunov
2009-04-12 17:57 ` [tip:x86/apic] " tip-bot for Cyrill Gorcunov
2009-04-12 16:47 ` [rfc 2/4] x86: apic - introduce imcr_ helpers Cyrill Gorcunov
2009-04-12 17:57 ` [tip:x86/apic] " tip-bot for Cyrill Gorcunov
2009-04-12 16:47 ` [rfc 3/4] x86: apic - introduce dummy apic operations Cyrill Gorcunov
2009-04-12 17:57 ` tip-bot for Cyrill Gorcunov [this message]
2009-04-12 16:47 ` [rfc 4/4] x86: smp.c - align smp_ops assignments Cyrill Gorcunov
2009-04-12 17:58 ` [tip:x86/apic] " tip-bot for Cyrill Gorcunov
2009-04-12 17:24 ` [rfc 0/4] x86 - apic dummy ops with cleanups Ingo Molnar
2009-04-12 18:00 ` Cyrill Gorcunov
2009-04-12 18:02 ` Ingo Molnar
2009-04-12 18:12 ` Cyrill Gorcunov
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