From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031638AbbDXQB4 (ORCPT ); Fri, 24 Apr 2015 12:01:56 -0400 Received: from terminus.zytor.com ([198.137.202.10]:44971 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031622AbbDXQBv (ORCPT ); Fri, 24 Apr 2015 12:01:51 -0400 Date: Fri, 24 Apr 2015 09:00:42 -0700 From: tip-bot for Thomas Gleixner Message-ID: Cc: linux-kernel@vger.kernel.org, konrad.wilk@oracle.com, tony.luck@intel.com, david.a.cohen@linux.intel.com, mingo@kernel.org, benh@kernel.crashing.org, linux@eikelenboom.it, sivanich@sgi.com, bp@alien8.de, joro@8bytes.org, hpa@zytor.com, david.vrabel@citrix.com, rjw@rjwysocki.net, yinghai@kernel.org, rdunlap@infradead.org, tglx@linutronix.de, bhelgaas@google.com, jiang.liu@linux.intel.com, gregkh@linuxfoundation.org, grant.likely@linaro.org Reply-To: rjw@rjwysocki.net, david.vrabel@citrix.com, rdunlap@infradead.org, tglx@linutronix.de, yinghai@kernel.org, gregkh@linuxfoundation.org, jiang.liu@linux.intel.com, bhelgaas@google.com, grant.likely@linaro.org, bp@alien8.de, joro@8bytes.org, hpa@zytor.com, mingo@kernel.org, benh@kernel.crashing.org, linux@eikelenboom.it, sivanich@sgi.com, konrad.wilk@oracle.com, linux-kernel@vger.kernel.org, tony.luck@intel.com, david.a.cohen@linux.intel.com In-Reply-To: <1428978610-28986-22-git-send-email-jiang.liu@linux.intel.com> References: <1428978610-28986-22-git-send-email-jiang.liu@linux.intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/apic] x86/irq: Remove sis apic bug workaround Git-Commit-ID: 1f934641294ca2e09016c689862378fbb15da4d4 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 1f934641294ca2e09016c689862378fbb15da4d4 Gitweb: http://git.kernel.org/tip/1f934641294ca2e09016c689862378fbb15da4d4 Author: Thomas Gleixner AuthorDate: Tue, 14 Apr 2015 10:29:58 +0800 Committer: Thomas Gleixner CommitDate: Fri, 24 Apr 2015 15:36:54 +0200 x86/irq: Remove sis apic bug workaround The SiS apic bug workaround is now obsolete as we cache the register values for performance reasons. Signed-off-by: Thomas Gleixner Signed-off-by: Jiang Liu Cc: Konrad Rzeszutek Wilk Cc: David Cohen Cc: Sander Eikelenboom Cc: David Vrabel Cc: Tony Luck Cc: Joerg Roedel Cc: Greg Kroah-Hartman Cc: Bjorn Helgaas Cc: Benjamin Herrenschmidt Cc: Rafael J. Wysocki Cc: Randy Dunlap Cc: Yinghai Lu Cc: Borislav Petkov Cc: Dimitri Sivanich Cc: Grant Likely Link: http://lkml.kernel.org/r/1428978610-28986-22-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/io_apic.h | 3 --- arch/x86/kernel/apic/io_apic.c | 35 ++++++++++------------------------- drivers/pci/quirks.c | 7 ------- 3 files changed, 10 insertions(+), 35 deletions(-) diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 9b90501..d58f1c6 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h @@ -120,9 +120,6 @@ extern int mp_irq_entries; /* MP IRQ source entries */ extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; -/* Older SiS APIC requires we rewrite the index register */ -extern int sis_apic_bug; - /* 1 if "noapic" boot option passed */ extern int skip_ioapic_setup; diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 4fb347f..9806f96 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -18,6 +18,16 @@ * and Rolf G. Tews * for testing these extensively * Paul Diefenbaugh : Added full ACPI support + * + * Historical information which is worth to be preserved: + * + * - SiS APIC rmw bug: + * + * We used to have a workaround for a bug in SiS chips which + * required to rewrite the index register for a read-modify-write + * operation as the chip lost the index information which was + * setup for the read already. We cache the data now, so that + * workaround has been removed. */ #include @@ -66,17 +76,6 @@ #define for_each_irq_pin(entry, head) \ list_for_each_entry(entry, &head, list) -/* - * Is the SiS APIC rmw bug present ? - * -1 = don't know, 0 = no, 1 = yes - * When doing a read-modify-write operation on IOAPIC registers, older SiS APIC - * requires we rewrite the index register again where the read already set up - * the index register. - * The code to make use of sis_apic_bug has been removed, but we don't want to - * lose this knowledge. - */ -int sis_apic_bug = -1; - static DEFINE_RAW_SPINLOCK(ioapic_lock); static DEFINE_MUTEX(ioapic_mutex); static unsigned int ioapic_dynirq_base; @@ -2320,20 +2319,6 @@ void __init setup_IO_APIC(void) ioapic_initialized = 1; } -/* - * Called after all the initialization is done. If we didn't find any - * APIC bugs then we can allow the modify fast path - */ - -static int __init io_apic_bug_finalize(void) -{ - if (sis_apic_bug == -1) - sis_apic_bug = 0; - return 0; -} - -late_initcall(io_apic_bug_finalize); - static void resume_ioapic_id(int ioapic_idx) { unsigned long flags; diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index c6dc1df..2890ad7 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -819,13 +819,6 @@ static void quirk_amd_ioapic(struct pci_dev *dev) } } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic); - -static void quirk_ioapic_rmw(struct pci_dev *dev) -{ - if (dev->devfn == 0 && dev->bus->number == 0) - sis_apic_bug = 1; -} -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw); #endif /* CONFIG_X86_IO_APIC */ /*