From: tip-bot for Will Deacon <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: mingo@kernel.org, will.deacon@arm.com, peterz@infradead.org,
tglx@linutronix.de, hpa@zytor.com, Waiman.Long@hp.com,
linux-kernel@vger.kernel.org, torvalds@linux-foundation.org
Subject: [tip:locking/core] locking/qrwlock: Implement queue_write_unlock( ) using smp_store_release()
Date: Wed, 12 Aug 2015 05:35:46 -0700 [thread overview]
Message-ID: <tip-2b2a85a4d3534b8884fcfa5bb52837f0e1c672bc@git.kernel.org> (raw)
In-Reply-To: <1438880084-18856-6-git-send-email-will.deacon@arm.com>
Commit-ID: 2b2a85a4d3534b8884fcfa5bb52837f0e1c672bc
Gitweb: http://git.kernel.org/tip/2b2a85a4d3534b8884fcfa5bb52837f0e1c672bc
Author: Will Deacon <will.deacon@arm.com>
AuthorDate: Thu, 6 Aug 2015 17:54:41 +0100
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 12 Aug 2015 11:59:05 +0200
locking/qrwlock: Implement queue_write_unlock() using smp_store_release()
Since the following commit:
536fa402221f ("compiler: Allow 1- and 2-byte smp_load_acquire() and smp_store_release()")
smp_store_release() supports byte accesses, so use that in writer unlock
and remove the conditional macro override.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Waiman Long <Waiman.Long@hp.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: paulmck@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1438880084-18856-6-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/include/asm/qrwlock.h | 10 ----------
include/asm-generic/qrwlock.h | 9 +--------
2 files changed, 1 insertion(+), 18 deletions(-)
diff --git a/arch/x86/include/asm/qrwlock.h b/arch/x86/include/asm/qrwlock.h
index a8810bf..c537cbb 100644
--- a/arch/x86/include/asm/qrwlock.h
+++ b/arch/x86/include/asm/qrwlock.h
@@ -2,16 +2,6 @@
#define _ASM_X86_QRWLOCK_H
#include <asm-generic/qrwlock_types.h>
-
-#ifndef CONFIG_X86_PPRO_FENCE
-#define queued_write_unlock queued_write_unlock
-static inline void queued_write_unlock(struct qrwlock *lock)
-{
- barrier();
- ACCESS_ONCE(*(u8 *)&lock->cnts) = 0;
-}
-#endif
-
#include <asm-generic/qrwlock.h>
#endif /* _ASM_X86_QRWLOCK_H */
diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
index deb9e8b..eb673dd 100644
--- a/include/asm-generic/qrwlock.h
+++ b/include/asm-generic/qrwlock.h
@@ -134,21 +134,14 @@ static inline void queued_read_unlock(struct qrwlock *lock)
atomic_sub(_QR_BIAS, &lock->cnts);
}
-#ifndef queued_write_unlock
/**
* queued_write_unlock - release write lock of a queue rwlock
* @lock : Pointer to queue rwlock structure
*/
static inline void queued_write_unlock(struct qrwlock *lock)
{
- /*
- * If the writer field is atomic, it can be cleared directly.
- * Otherwise, an atomic subtraction will be used to clear it.
- */
- smp_mb__before_atomic();
- atomic_sub(_QW_LOCKED, &lock->cnts);
+ smp_store_release((u8 *)&lock->cnts, 0);
}
-#endif
/*
* Remapping rwlock architecture specific functions to the corresponding
next prev parent reply other threads:[~2015-08-12 12:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-06 16:54 [PATCH v5 0/8] Add generic support for relaxed atomics Will Deacon
2015-08-06 16:54 ` [PATCH v5 1/8] atomics: add acquire/release/relaxed variants of some atomic operations Will Deacon
2015-08-12 12:34 ` [tip:locking/core] locking/atomics: Add _{acquire|release|relaxed}() " tip-bot for Will Deacon
2015-08-06 16:54 ` [PATCH v5 2/8] asm-generic: rework atomic-long.h to avoid bulk code duplication Will Deacon
2015-08-12 12:34 ` [tip:locking/core] locking, asm-generic: Rework " tip-bot for Will Deacon
2015-08-06 16:54 ` [PATCH v5 3/8] asm-generic: add relaxed/acquire/release variants for atomic_long_t Will Deacon
2015-08-12 12:35 ` [tip:locking/core] locking, asm-generic: Add _{relaxed|acquire|release}() variants for 'atomic_long_t' tip-bot for Will Deacon
2015-08-06 16:54 ` [PATCH v5 4/8] lockref: remove homebrew cmpxchg64_relaxed macro definition Will Deacon
2015-08-12 12:35 ` [tip:locking/core] locking/lockref: Remove homebrew cmpxchg64_relaxed() " tip-bot for Will Deacon
2015-08-06 16:54 ` [PATCH v5 5/8] locking/qrwlock: implement queue_write_unlock using smp_store_release Will Deacon
2015-08-12 12:35 ` tip-bot for Will Deacon [this message]
2015-08-06 16:54 ` [PATCH v5 6/8] locking/qrwlock: make use of acquire/release/relaxed atomics Will Deacon
2015-08-12 12:36 ` [tip:locking/core] locking/qrwlock: Make use of _{acquire|release|relaxed}() atomics tip-bot for Will Deacon
2015-08-06 16:54 ` [PATCH v5 7/8] include/llist: use linux/atomic.h instead of asm/cmpxchg.h Will Deacon
2015-08-12 12:36 ` [tip:locking/core] locking, include/llist: Use linux/ atomic.h " tip-bot for Will Deacon
2015-08-06 16:54 ` [PATCH v5 8/8] ARM: atomics: define our SMP atomics in terms of _relaxed operations Will Deacon
2015-08-12 12:36 ` [tip:locking/core] locking, ARM, atomics: Define our SMP atomics in terms of _relaxed() operations tip-bot for Will Deacon
2015-08-07 15:13 ` [PATCH v5 0/8] Add generic support for relaxed atomics Peter Zijlstra
2015-08-07 16:29 ` Will Deacon
2015-08-26 4:28 ` Boqun Feng
2015-08-26 10:41 ` Will Deacon
2015-08-26 11:35 ` Boqun Feng
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