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From: tip-bot for Jiang Liu <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: jiang.liu@linux.intel.com, tony.luck@intel.com, sivanich@sgi.com,
	david.vrabel@citrix.com, tglx@linutronix.de, hpa@zytor.com,
	konrad.wilk@oracle.com, mingo@kernel.org, joro@8bytes.org,
	yinghai@kernel.org, bp@alien8.de, linux-kernel@vger.kernel.org,
	benh@kernel.crashing.org, linux@eikelenboom.it,
	gregkh@linuxfoundation.org, rjw@rjwysocki.net, jroedel@suse.de,
	rdunlap@infradead.org, bhelgaas@google.com,
	david.a.cohen@linux.intel.com
Subject: [tip:x86/apic] irq_remapping/vt-d: Clean up unused MSI related code
Date: Fri, 24 Apr 2015 08:47:42 -0700	[thread overview]
Message-ID: <tip-2b43817e481da9f5118adb56aef46b3f0298c685@git.kernel.org> (raw)
In-Reply-To: <1428905519-23704-16-git-send-email-jiang.liu@linux.intel.com>

Commit-ID:  2b43817e481da9f5118adb56aef46b3f0298c685
Gitweb:     http://git.kernel.org/tip/2b43817e481da9f5118adb56aef46b3f0298c685
Author:     Jiang Liu <jiang.liu@linux.intel.com>
AuthorDate: Mon, 13 Apr 2015 14:11:37 +0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 24 Apr 2015 15:36:49 +0200

irq_remapping/vt-d: Clean up unused MSI related code

Now MSI interrupt has been converted to new hierarchical irqdomain
interfaces, so remove legacy MSI related code.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Sander Eikelenboom <linux@eikelenboom.it>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: iommu@lists.linux-foundation.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Cc: Joerg Roedel <joro@8bytes.org>
Link: http://lkml.kernel.org/r/1428905519-23704-16-git-send-email-jiang.liu@linux.intel.com
---
 drivers/iommu/intel_irq_remapping.c | 144 ------------------------------------
 1 file changed, 144 deletions(-)

diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index 97ea420..71a25ae 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -145,44 +145,6 @@ static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)
 	return qi_submit_sync(&desc, iommu);
 }
 
-static int map_irq_to_irte_handle(int irq, u16 *sub_handle)
-{
-	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
-	unsigned long flags;
-	int index;
-
-	if (!irq_iommu)
-		return -1;
-
-	raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
-	*sub_handle = irq_iommu->sub_handle;
-	index = irq_iommu->irte_index;
-	raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-	return index;
-}
-
-static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
-{
-	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
-	struct irq_cfg *cfg = irq_cfg(irq);
-	unsigned long flags;
-
-	if (!irq_iommu)
-		return -1;
-
-	raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
-
-	cfg->remapped = 1;
-	irq_iommu->iommu = iommu;
-	irq_iommu->irte_index = index;
-	irq_iommu->sub_handle = subhandle;
-	irq_iommu->irte_mask = 0;
-
-	raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-
-	return 0;
-}
-
 static int modify_irte(struct irq_2_iommu *irq_iommu,
 		       struct irte *irte_modified)
 {
@@ -1127,108 +1089,6 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
 	return 0;
 }
 
-static void intel_compose_msi_msg(struct pci_dev *pdev,
-				  unsigned int irq, unsigned int dest,
-				  struct msi_msg *msg, u8 hpet_id)
-{
-	struct irq_cfg *cfg;
-	struct irte irte;
-	u16 sub_handle = 0;
-	int ir_index;
-
-	cfg = irq_cfg(irq);
-
-	ir_index = map_irq_to_irte_handle(irq, &sub_handle);
-	BUG_ON(ir_index == -1);
-
-	prepare_irte(&irte, cfg->vector, dest);
-
-	/* Set source-id of interrupt request */
-	if (pdev)
-		set_msi_sid(&irte, pdev);
-	else
-		set_hpet_sid(&irte, hpet_id);
-
-	modify_irte(irq_2_iommu(irq), &irte);
-
-	msg->address_hi = MSI_ADDR_BASE_HI;
-	msg->data = sub_handle;
-	msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |
-			  MSI_ADDR_IR_SHV |
-			  MSI_ADDR_IR_INDEX1(ir_index) |
-			  MSI_ADDR_IR_INDEX2(ir_index);
-}
-
-/*
- * Map the PCI dev to the corresponding remapping hardware unit
- * and allocate 'nvec' consecutive interrupt-remapping table entries
- * in it.
- */
-static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec)
-{
-	struct intel_iommu *iommu;
-	int index;
-
-	down_read(&dmar_global_lock);
-	iommu = map_dev_to_ir(dev);
-	if (!iommu) {
-		printk(KERN_ERR
-		       "Unable to map PCI %s to iommu\n", pci_name(dev));
-		index = -ENOENT;
-	} else {
-		index = alloc_irte(iommu, irq, irq_2_iommu(irq), nvec);
-		if (index < 0) {
-			printk(KERN_ERR
-			       "Unable to allocate %d IRTE for PCI %s\n",
-			       nvec, pci_name(dev));
-			index = -ENOSPC;
-		}
-	}
-	up_read(&dmar_global_lock);
-
-	return index;
-}
-
-static int intel_msi_setup_irq(struct pci_dev *pdev, unsigned int irq,
-			       int index, int sub_handle)
-{
-	struct intel_iommu *iommu;
-	int ret = -ENOENT;
-
-	down_read(&dmar_global_lock);
-	iommu = map_dev_to_ir(pdev);
-	if (iommu) {
-		/*
-		 * setup the mapping between the irq and the IRTE
-		 * base index, the sub_handle pointing to the
-		 * appropriate interrupt remap table entry.
-		 */
-		set_irte_irq(irq, iommu, index, sub_handle);
-		ret = 0;
-	}
-	up_read(&dmar_global_lock);
-
-	return ret;
-}
-
-static int intel_alloc_hpet_msi(unsigned int irq, unsigned int id)
-{
-	int ret = -1;
-	struct intel_iommu *iommu;
-	int index;
-
-	down_read(&dmar_global_lock);
-	iommu = map_hpet_to_ir(id);
-	if (iommu) {
-		index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1);
-		if (index >= 0)
-			ret = 0;
-	}
-	up_read(&dmar_global_lock);
-
-	return ret;
-}
-
 static struct irq_domain *intel_get_ir_irq_domain(struct irq_alloc_info *info)
 {
 	struct intel_iommu *iommu = NULL;
@@ -1285,10 +1145,6 @@ struct irq_remap_ops intel_irq_remap_ops = {
 	.setup_ioapic_entry	= intel_setup_ioapic_entry,
 	.set_affinity		= intel_ioapic_set_affinity,
 	.free_irq		= free_irte,
-	.compose_msi_msg	= intel_compose_msi_msg,
-	.msi_alloc_irq		= intel_msi_alloc_irq,
-	.msi_setup_irq		= intel_msi_setup_irq,
-	.alloc_hpet_msi		= intel_alloc_hpet_msi,
 	.get_ir_irq_domain	= intel_get_ir_irq_domain,
 	.get_irq_domain		= intel_get_irq_domain,
 };

  reply	other threads:[~2015-04-24 15:48 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-13  6:11 [Patch Part1 v8 00/37] Convert x86 to hierarchy irqdomain and stacked irqchip Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 01/37] x86/irq: Save destination CPU ID in irq_cfg Jiang Liu
2015-04-24 15:43   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 02/37] x86/irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2015-04-24 15:43   ` [tip:x86/apic] x86/irq: Use hierarchical " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 03/37] x86/hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 04/37] x86/MSI: " Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 05/37] x86/uv: " Jiang Liu
2015-04-24 15:44   ` [tip:x86/apic] x86/uv: Use new irqdomain interfaces to allocate/ free IRQ tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 06/37] x86/htirq: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2015-04-24 15:44   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 07/37] x86/dmar: " Jiang Liu
2015-04-24 15:45   ` [tip:x86/apic] x86/dmar: Use new irqdomain interfaces to allocate /free IRQ tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 08/37] irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2015-04-24 15:45   ` [tip:x86/apic] irq_remapping: Introduce new interfaces to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 09/37] irq_remapping/vt-d: Change prototypes to prepare for enabling hierarchy irqdomain Jiang Liu
2015-04-24 15:45   ` [tip:x86/apic] irq_remapping/vt-d: Change prototypes to prepare for hierarchical irqdomain tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 10/37] irq_remapping/vt-d: Enhance Intel IR driver to support hierarchy irqdomain Jiang Liu
2015-04-24 15:46   ` [tip:x86/apic] irq_remapping/vt-d: Enhance Intel IR driver to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 11/37] irq_remapping/amd: Enhance AMD IR driver to support hierarchy irqdomain Jiang Liu
2015-04-24 15:46   ` [tip:x86/apic] irq_remapping/amd: Enhance AMD IR driver to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 12/37] x86/hpet: Enhance HPET IRQ to support hierarchy irqdomain Jiang Liu
2015-04-24 15:46   ` [tip:x86/apic] x86/hpet: Enhance HPET IRQ to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 13/37] x86/MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2015-04-24 15:47   ` [tip:x86/apic] x86/MSI: Use hierarchical irqdomains " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 14/37] x86/irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
2015-04-24 15:47   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 15/37] irq_remapping/vt-d: Clean up unused MSI related code Jiang Liu
2015-04-24 15:47   ` tip-bot for Jiang Liu [this message]
2015-04-13  6:11 ` [Patch Part1 v8 16/37] irq_remapping/amd: " Jiang Liu
2015-04-24 15:48   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 17/37] irq_remapping: " Jiang Liu
2015-04-24 15:48   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 18/37] x86/MSI: Clean up unused MSI related code and interfaces Jiang Liu
2015-04-24 15:48   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 19/37] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2015-04-24 15:48   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 20/37] x86/irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2015-04-24 15:49   ` [tip:x86/apic] x86/irq: Use hierarchical " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 21/37] x86/htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2015-04-24 15:49   ` [tip:x86/apic] x86/htirq: Use hierarchical " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 22/37] x86/uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2015-04-24 15:49   ` [tip:x86/apic] x86/uv: Use hierarchical " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 23/37] x86/irq: Normalize x86 irq_chip name Jiang Liu
2015-04-24 15:50   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 24/37] x86/MSI: Simplify the way to deal with remapped MSI interrupts Jiang Liu
2015-04-24 15:50   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 25/37] x86/MSI: Replace msi_update_msg() with irq_chip_compose_msi_msg() Jiang Liu
2015-04-24 15:50   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 26/37] x86/irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips Jiang Liu
2015-04-24 15:50   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 27/37] x86/irq: Simplify MSI/DMAR/HPET implementation by using common code Jiang Liu
2015-04-24 15:51   ` [tip:x86/apic] x86/irq: Simplify MSI/DMAR/ HPET " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 28/37] irq_remapping: Kill unused function irq_remapping_print_chip() Jiang Liu
2015-04-24 15:51   ` [tip:x86/apic] irq_remapping: Remove " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 29/37] x86/intel-mid: Delay initialization of APB timer Jiang Liu
2015-04-24 15:51   ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2015-04-13  6:11 ` [Patch Part1 v8 30/37] x86/intel-mid, trivial: Refine code syntax for sfi_parse_mtmr() Jiang Liu
2015-04-24 15:52   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 31/37] x86/irq: Kill unused pre_init_apic_IRQ0() Jiang Liu
2015-04-24 15:52   ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 32/37] x86/irq: Prepare IOAPIC interfaces to support hierarchy irqdomain Jiang Liu
2015-04-24 15:52   ` [tip:x86/apic] x86/irq: Prepare IOAPIC interfaces to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 33/37] x86/irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs Jiang Liu
2015-04-24 15:53   ` [tip:x86/apic] x86/irq: Implement callbacks to enable hierarchical irqdomains " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 34/37] x86/irq: Refine the way to allocate irq_cfg for legacy IRQs Jiang Liu
2015-04-24 15:53   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 35/37] x86/irq: Simplify the way to print IOAPIC entry Jiang Liu
2015-04-24 15:53   ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 36/37] x86/irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC Jiang Liu
2015-04-24 15:53   ` [tip:x86/apic] x86/irq: Introduce helper functions to support hierarchical irqdomains " tip-bot for Jiang Liu
2015-04-13  6:11 ` [Patch Part1 v8 37/37] x86/irq: Convert IOAPIC to use hierarchy irqdomain interfaces Jiang Liu
2015-04-24 15:54   ` [tip:x86/apic] x86/irq: Convert IOAPIC to use hierarchical " tip-bot for Jiang Liu
2015-04-13  6:19 ` [Patch Part1 v8 00/37] Convert x86 to hierarchy irqdomain and stacked irqchip Ingo Molnar
2015-04-13  6:23   ` Jiang Liu
2015-04-13  7:09     ` Thomas Gleixner
2015-04-13 12:09   ` Rafael J. Wysocki

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