From: tip-bot for Ravi Bangoria <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: mhiramat@kernel.org, linux-kernel@vger.kernel.org,
alexander.shishkin@linux.intel.com,
ravi.bangoria@linux.vnet.ibm.com, alexis.berlemont@gmail.com,
acme@redhat.com, peterz@infradead.org, tglx@linutronix.de,
hemant@linux.vnet.ibm.com, mingo@kernel.org, mpe@ellerman.id.au,
hpa@zytor.com, naveen.n.rao@linux.vnet.ibm.com
Subject: [tip:perf/core] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers
Date: Sun, 2 Apr 2017 12:12:01 -0700 [thread overview]
Message-ID: <tip-2d01ecc580405169ecd6e3880617bc61cf482fdd@git.kernel.org> (raw)
In-Reply-To: <20170328094754.3156-2-ravi.bangoria@linux.vnet.ibm.com>
Commit-ID: 2d01ecc580405169ecd6e3880617bc61cf482fdd
Gitweb: http://git.kernel.org/tip/2d01ecc580405169ecd6e3880617bc61cf482fdd
Author: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
AuthorDate: Tue, 28 Mar 2017 15:17:52 +0530
Committer: Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Tue, 28 Mar 2017 12:24:56 -0300
perf/sdt/x86: Add renaming logic for (missing) 8 bit registers
I found couple of events using al, bl, cl and dl registers for argument.
These are not directly accepted by uprobe_events and thus needs to be
mapped to ax, bx, cx and dx respectively.
Few ex,
/usr/bin/qemu-system-s390x
css_adapter_interrupt: 1@%bl
css_chpid_add: 1@%cl 1@%sil 1@%dl
dma_bdrv_io: 8@%rbx 8@%rbp -8@%r14 1@%al
/usr/bin/postgres
buffer__read__done: ... -1@-bash -1@%al
buffer__read__start: ... -1@%al
I don't find any sdt events using ah, bh,... registers. But I also don't
see any reason to not use them, so there might be rare events using
these registers, and if so, perf should have a renaming logic for them
too.
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexis Berlemont <alexis.berlemont@gmail.com>
Cc: Hemant Kumar <hemant@linux.vnet.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20170328094754.3156-2-ravi.bangoria@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
tools/perf/arch/x86/util/perf_regs.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c
index d8a8dcf..fa1fd19 100644
--- a/tools/perf/arch/x86/util/perf_regs.c
+++ b/tools/perf/arch/x86/util/perf_regs.c
@@ -40,12 +40,20 @@ struct sdt_name_reg {
static const struct sdt_name_reg sdt_reg_renamings[] = {
SDT_NAME_REG(eax, ax),
SDT_NAME_REG(rax, ax),
+ SDT_NAME_REG(al, ax),
+ SDT_NAME_REG(ah, ax),
SDT_NAME_REG(ebx, bx),
SDT_NAME_REG(rbx, bx),
+ SDT_NAME_REG(bl, bx),
+ SDT_NAME_REG(bh, bx),
SDT_NAME_REG(ecx, cx),
SDT_NAME_REG(rcx, cx),
+ SDT_NAME_REG(cl, cx),
+ SDT_NAME_REG(ch, cx),
SDT_NAME_REG(edx, dx),
SDT_NAME_REG(rdx, dx),
+ SDT_NAME_REG(dl, dx),
+ SDT_NAME_REG(dh, dx),
SDT_NAME_REG(esi, si),
SDT_NAME_REG(rsi, si),
SDT_NAME_REG(sil, si),
next prev parent reply other threads:[~2017-04-02 19:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-28 9:47 [PATCH v3 0/3] perf/sdt: Hardening argument support Ravi Bangoria
2017-03-28 9:47 ` [PATCH v3 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers Ravi Bangoria
2017-04-02 19:12 ` tip-bot for Ravi Bangoria [this message]
2017-03-28 9:47 ` [PATCH v3 2/3] perf/sdt/x86: Move OP parser to tools/perf/arch/x86/ Ravi Bangoria
2017-04-02 19:12 ` [tip:perf/core] " tip-bot for Ravi Bangoria
2017-03-28 9:47 ` [PATCH v3 3/3] perf/sdt/powerpc: Add argument support Ravi Bangoria
2017-04-05 5:50 ` [tip:perf/core] perf sdt powerpc: " tip-bot for Ravi Bangoria
2017-03-28 15:29 ` [PATCH v3 0/3] perf/sdt: Hardening " Masami Hiramatsu
2017-03-28 15:40 ` Arnaldo Carvalho de Melo
2017-04-01 5:31 ` Ravi Bangoria
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