From: tip-bot for Jiang Liu <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: jiang.liu@linux.intel.com, yinghai@kernel.org,
vinod.koul@intel.com, tglx@linutronix.de, bp@alien8.de,
linux@eikelenboom.it, hpa@zytor.com, mingo@kernel.org,
david.a.cohen@linux.intel.com, tony.luck@intel.com,
fenghua.yu@intel.com, linux-kernel@vger.kernel.org,
joro@8bytes.org, benh@kernel.crashing.org,
david.vrabel@citrix.com, bhelgaas@google.com,
rdunlap@infradead.org, rjw@rjwysocki.net,
gregkh@linuxfoundation.org, sivanich@sgi.com,
konrad.wilk@oracle.com
Subject: [tip:x86/apic] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit
Date: Fri, 24 Apr 2015 08:48:57 -0700 [thread overview]
Message-ID: <tip-34742db8eaf9ff364034f214ee5827701e131d4b@git.kernel.org> (raw)
In-Reply-To: <1428905519-23704-20-git-send-email-jiang.liu@linux.intel.com>
Commit-ID: 34742db8eaf9ff364034f214ee5827701e131d4b
Gitweb: http://git.kernel.org/tip/34742db8eaf9ff364034f214ee5827701e131d4b
Author: Jiang Liu <jiang.liu@linux.intel.com>
AuthorDate: Mon, 13 Apr 2015 14:11:41 +0800
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 24 Apr 2015 15:36:49 +0200
iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit
Refine the interfaces to create IRQ for DMAR unit. It's a preparation
for converting DMAR IRQ to hierarchical irqdomain on x86.
It also moves dmar_alloc_hwirq()/dmar_free_hwirq() from irq_remapping.h
to dmar.h. They are not irq_remapping specific.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Sander Eikelenboom <linux@eikelenboom.it>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: iommu@lists.linux-foundation.org
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Link: http://lkml.kernel.org/r/1428905519-23704-20-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/ia64/include/asm/irq_remapping.h | 2 --
arch/ia64/kernel/msi_ia64.c | 30 +++++++++++++++++++-----------
arch/x86/include/asm/irq_remapping.h | 4 ----
arch/x86/kernel/apic/msi.c | 24 +++++++++++++-----------
drivers/iommu/dmar.c | 19 +++++--------------
include/linux/dmar.h | 3 ++-
6 files changed, 39 insertions(+), 43 deletions(-)
diff --git a/arch/ia64/include/asm/irq_remapping.h b/arch/ia64/include/asm/irq_remapping.h
index e3b3556..a8687b1 100644
--- a/arch/ia64/include/asm/irq_remapping.h
+++ b/arch/ia64/include/asm/irq_remapping.h
@@ -1,6 +1,4 @@
#ifndef __IA64_INTR_REMAPPING_H
#define __IA64_INTR_REMAPPING_H
#define irq_remapping_enabled 0
-#define dmar_alloc_hwirq create_irq
-#define dmar_free_hwirq destroy_irq
#endif
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 9dd7464..d70bf15 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -165,7 +165,7 @@ static struct irq_chip dmar_msi_type = {
.irq_retrigger = ia64_msi_retrigger_irq,
};
-static int
+static void
msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
{
struct irq_cfg *cfg = irq_cfg + irq;
@@ -186,21 +186,29 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
MSI_DATA_LEVEL_ASSERT |
MSI_DATA_DELIVERY_FIXED |
MSI_DATA_VECTOR(cfg->vector);
- return 0;
}
-int arch_setup_dmar_msi(unsigned int irq)
+int dmar_alloc_hwirq(int id, int node, void *arg)
{
- int ret;
+ int irq;
struct msi_msg msg;
- ret = msi_compose_msg(NULL, irq, &msg);
- if (ret < 0)
- return ret;
- dmar_msi_write(irq, &msg);
- irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
- "edge");
- return 0;
+ irq = create_irq();
+ if (irq > 0) {
+ irq_set_handler_data(irq, arg);
+ irq_set_chip_and_handler_name(irq, &dmar_msi_type,
+ handle_edge_irq, "edge");
+ msi_compose_msg(NULL, irq, &msg);
+ dmar_msi_write(irq, &msg);
+ }
+
+ return irq;
+}
+
+void dmar_free_hwirq(int irq)
+{
+ irq_set_handler_data(irq, NULL);
+ destroy_irq(irq);
}
#endif /* CONFIG_INTEL_IOMMU */
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index b978c68..bacac10 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -117,8 +117,4 @@ irq_remapping_get_irq_domain(struct irq_alloc_info *info)
#define irq_remapping_print_chip NULL
#endif /* CONFIG_IRQ_REMAP */
-
-extern int dmar_alloc_hwirq(void);
-extern void dmar_free_hwirq(int irq);
-
#endif /* __X86_IRQ_REMAPPING_H */
diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index 9fe7a08..ca62504 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -228,25 +228,27 @@ static struct irq_chip dmar_msi_type = {
.flags = IRQCHIP_SKIP_SET_WAKE,
};
-int arch_setup_dmar_msi(unsigned int irq)
+int dmar_alloc_hwirq(int id, int node, void *arg)
{
+ int irq;
struct msi_msg msg;
- struct irq_cfg *cfg = irq_cfg(irq);
- native_compose_msi_msg(cfg, &msg);
- dmar_msi_write(irq, &msg);
- irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
- "edge");
- return 0;
-}
+ irq = irq_domain_alloc_irqs(NULL, 1, node, NULL);
+ if (irq > 0) {
+ irq_set_handler_data(irq, arg);
+ irq_set_chip_and_handler_name(irq, &dmar_msi_type,
+ handle_edge_irq, "edge");
+ native_compose_msi_msg(irq_cfg(irq), &msg);
+ dmar_msi_write(irq, &msg);
+ }
-int dmar_alloc_hwirq(void)
-{
- return irq_domain_alloc_irqs(NULL, 1, NUMA_NO_NODE, NULL);
+ return irq;
}
void dmar_free_hwirq(int irq)
{
+ irq_set_handler_data(irq, NULL);
+ irq_set_handler(irq, NULL);
irq_domain_free_irqs(irq, 1);
}
#endif
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 9847613..536f2d8 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -1087,8 +1087,8 @@ static void free_iommu(struct intel_iommu *iommu)
if (iommu->irq) {
free_irq(iommu->irq, iommu);
- irq_set_handler_data(iommu->irq, NULL);
dmar_free_hwirq(iommu->irq);
+ iommu->irq = 0;
}
if (iommu->qi) {
@@ -1642,23 +1642,14 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
if (iommu->irq)
return 0;
- irq = dmar_alloc_hwirq();
- if (irq <= 0) {
+ irq = dmar_alloc_hwirq(iommu->seq_id, iommu->node, iommu);
+ if (irq > 0) {
+ iommu->irq = irq;
+ } else {
pr_err("IOMMU: no free vectors\n");
return -EINVAL;
}
- irq_set_handler_data(irq, iommu);
- iommu->irq = irq;
-
- ret = arch_setup_dmar_msi(irq);
- if (ret) {
- irq_set_handler_data(irq, NULL);
- iommu->irq = 0;
- dmar_free_hwirq(irq);
- return ret;
- }
-
ret = request_irq(irq, dmar_fault, IRQF_NO_THREAD, iommu->name, iommu);
if (ret)
pr_err("IOMMU: can't request irq\n");
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index 3062495..8473756 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -227,6 +227,7 @@ extern void dmar_msi_read(int irq, struct msi_msg *msg);
extern void dmar_msi_write(int irq, struct msi_msg *msg);
extern int dmar_set_interrupt(struct intel_iommu *iommu);
extern irqreturn_t dmar_fault(int irq, void *dev_id);
-extern int arch_setup_dmar_msi(unsigned int irq);
+extern int dmar_alloc_hwirq(int id, int node, void *arg);
+extern void dmar_free_hwirq(int irq);
#endif /* __DMAR_H__ */
next prev parent reply other threads:[~2015-04-24 15:50 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-13 6:11 [Patch Part1 v8 00/37] Convert x86 to hierarchy irqdomain and stacked irqchip Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 01/37] x86/irq: Save destination CPU ID in irq_cfg Jiang Liu
2015-04-24 15:43 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 02/37] x86/irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2015-04-24 15:43 ` [tip:x86/apic] x86/irq: Use hierarchical " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 03/37] x86/hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 04/37] x86/MSI: " Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 05/37] x86/uv: " Jiang Liu
2015-04-24 15:44 ` [tip:x86/apic] x86/uv: Use new irqdomain interfaces to allocate/ free IRQ tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 06/37] x86/htirq: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2015-04-24 15:44 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 07/37] x86/dmar: " Jiang Liu
2015-04-24 15:45 ` [tip:x86/apic] x86/dmar: Use new irqdomain interfaces to allocate /free IRQ tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 08/37] irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2015-04-24 15:45 ` [tip:x86/apic] irq_remapping: Introduce new interfaces to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 09/37] irq_remapping/vt-d: Change prototypes to prepare for enabling hierarchy irqdomain Jiang Liu
2015-04-24 15:45 ` [tip:x86/apic] irq_remapping/vt-d: Change prototypes to prepare for hierarchical irqdomain tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 10/37] irq_remapping/vt-d: Enhance Intel IR driver to support hierarchy irqdomain Jiang Liu
2015-04-24 15:46 ` [tip:x86/apic] irq_remapping/vt-d: Enhance Intel IR driver to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 11/37] irq_remapping/amd: Enhance AMD IR driver to support hierarchy irqdomain Jiang Liu
2015-04-24 15:46 ` [tip:x86/apic] irq_remapping/amd: Enhance AMD IR driver to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 12/37] x86/hpet: Enhance HPET IRQ to support hierarchy irqdomain Jiang Liu
2015-04-24 15:46 ` [tip:x86/apic] x86/hpet: Enhance HPET IRQ to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 13/37] x86/MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2015-04-24 15:47 ` [tip:x86/apic] x86/MSI: Use hierarchical irqdomains " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 14/37] x86/irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
2015-04-24 15:47 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 15/37] irq_remapping/vt-d: Clean up unused MSI related code Jiang Liu
2015-04-24 15:47 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 16/37] irq_remapping/amd: " Jiang Liu
2015-04-24 15:48 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 17/37] irq_remapping: " Jiang Liu
2015-04-24 15:48 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 18/37] x86/MSI: Clean up unused MSI related code and interfaces Jiang Liu
2015-04-24 15:48 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 19/37] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2015-04-24 15:48 ` tip-bot for Jiang Liu [this message]
2015-04-13 6:11 ` [Patch Part1 v8 20/37] x86/irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2015-04-24 15:49 ` [tip:x86/apic] x86/irq: Use hierarchical " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 21/37] x86/htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2015-04-24 15:49 ` [tip:x86/apic] x86/htirq: Use hierarchical " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 22/37] x86/uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2015-04-24 15:49 ` [tip:x86/apic] x86/uv: Use hierarchical " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 23/37] x86/irq: Normalize x86 irq_chip name Jiang Liu
2015-04-24 15:50 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 24/37] x86/MSI: Simplify the way to deal with remapped MSI interrupts Jiang Liu
2015-04-24 15:50 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 25/37] x86/MSI: Replace msi_update_msg() with irq_chip_compose_msi_msg() Jiang Liu
2015-04-24 15:50 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 26/37] x86/irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips Jiang Liu
2015-04-24 15:50 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 27/37] x86/irq: Simplify MSI/DMAR/HPET implementation by using common code Jiang Liu
2015-04-24 15:51 ` [tip:x86/apic] x86/irq: Simplify MSI/DMAR/ HPET " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 28/37] irq_remapping: Kill unused function irq_remapping_print_chip() Jiang Liu
2015-04-24 15:51 ` [tip:x86/apic] irq_remapping: Remove " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 29/37] x86/intel-mid: Delay initialization of APB timer Jiang Liu
2015-04-24 15:51 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2015-04-13 6:11 ` [Patch Part1 v8 30/37] x86/intel-mid, trivial: Refine code syntax for sfi_parse_mtmr() Jiang Liu
2015-04-24 15:52 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 31/37] x86/irq: Kill unused pre_init_apic_IRQ0() Jiang Liu
2015-04-24 15:52 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 32/37] x86/irq: Prepare IOAPIC interfaces to support hierarchy irqdomain Jiang Liu
2015-04-24 15:52 ` [tip:x86/apic] x86/irq: Prepare IOAPIC interfaces to support hierarchical irqdomains tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 33/37] x86/irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs Jiang Liu
2015-04-24 15:53 ` [tip:x86/apic] x86/irq: Implement callbacks to enable hierarchical irqdomains " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 34/37] x86/irq: Refine the way to allocate irq_cfg for legacy IRQs Jiang Liu
2015-04-24 15:53 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 35/37] x86/irq: Simplify the way to print IOAPIC entry Jiang Liu
2015-04-24 15:53 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 36/37] x86/irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC Jiang Liu
2015-04-24 15:53 ` [tip:x86/apic] x86/irq: Introduce helper functions to support hierarchical irqdomains " tip-bot for Jiang Liu
2015-04-13 6:11 ` [Patch Part1 v8 37/37] x86/irq: Convert IOAPIC to use hierarchy irqdomain interfaces Jiang Liu
2015-04-24 15:54 ` [tip:x86/apic] x86/irq: Convert IOAPIC to use hierarchical " tip-bot for Jiang Liu
2015-04-13 6:19 ` [Patch Part1 v8 00/37] Convert x86 to hierarchy irqdomain and stacked irqchip Ingo Molnar
2015-04-13 6:23 ` Jiang Liu
2015-04-13 7:09 ` Thomas Gleixner
2015-04-13 12:09 ` Rafael J. Wysocki
-- strict thread matches above, loose matches on Subject: below --
2014-11-25 5:53 [Patch Part2 v6 19/27] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
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