From: tip-bot for Andi Kleen <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, ak@linux.intel.com,
torvalds@linux-foundation.org, tglx@linutronix.de, hpa@zytor.com,
mingo@kernel.org, peterz@infradead.org
Subject: [tip:perf/core] perf/x86/intel/uncore: Use Sandy Bridge client PMU on Haswell/Broadwell
Date: Tue, 4 Aug 2015 01:52:56 -0700 [thread overview]
Message-ID: <tip-3a999587b4a1815cf4dadddf6b5aad470f048239@git.kernel.org> (raw)
In-Reply-To: <1434347862-28490-2-git-send-email-andi@firstfloor.org>
Commit-ID: 3a999587b4a1815cf4dadddf6b5aad470f048239
Gitweb: http://git.kernel.org/tip/3a999587b4a1815cf4dadddf6b5aad470f048239
Author: Andi Kleen <ak@linux.intel.com>
AuthorDate: Sun, 14 Jun 2015 22:57:41 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 4 Aug 2015 10:16:53 +0200
perf/x86/intel/uncore: Use Sandy Bridge client PMU on Haswell/Broadwell
Haswell and Broadwell have the same uncore CBOX/ARB PMU as Sandy Bridge.
Add the respective model numbers to enable the SNB uncore PMU.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: eranian@google.com
Cc: kan.liang@intel.com
Link: http://lkml.kernel.org/r/1434347862-28490-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel_uncore.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 21b5e38..c2af967 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -1209,6 +1209,11 @@ static int __init uncore_cpu_init(void)
break;
case 42: /* Sandy Bridge */
case 58: /* Ivy Bridge */
+ case 60: /* Haswell */
+ case 69: /* Haswell */
+ case 70: /* Haswell */
+ case 61: /* Broadwell */
+ case 71: /* Broadwell */
snb_uncore_cpu_init();
break;
case 45: /* Sandy Bridge-EP */
next prev parent reply other threads:[~2015-08-04 8:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-15 5:57 [PATCH 1/3] x86, perf, uncore: Add support for ARB uncore PMU on Sandy/IvyBridge Andi Kleen
2015-06-15 5:57 ` [PATCH 2/3] x86, perf, uncore: Use Sandy Bridge client PMU on Haswell/Broadwell Andi Kleen
2015-08-04 8:52 ` tip-bot for Andi Kleen [this message]
2015-06-15 5:57 ` [PATCH 3/3] x86, perf, uncore: Don't make MSR uncore depend on PCI uncore Andi Kleen
2015-06-16 12:06 ` Thomas Gleixner
2015-08-04 8:52 ` [tip:perf/core] perf/x86/intel/uncore: Add support for ARB uncore PMU on Sandy/IvyBridge tip-bot for Andi Kleen
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