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From: tip-bot for Thomas Gleixner <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: joro@8bytes.org, tglx@linutronix.de,
	linux-kernel@vger.kernel.org, mingo@kernel.org,
	feng.wu@intel.com, hpa@zytor.com
Subject: [tip:x86/apic] iommu: dmar: Extend struct irte for VT-d Posted-Interrupts
Date: Fri, 12 Jun 2015 02:48:54 -0700	[thread overview]
Message-ID: <tip-3bf17472226b0041b0c61363bd57a5cadbe620c4@git.kernel.org> (raw)
In-Reply-To: <1433827237-3382-3-git-send-email-feng.wu@intel.com>

Commit-ID:  3bf17472226b0041b0c61363bd57a5cadbe620c4
Gitweb:     http://git.kernel.org/tip/3bf17472226b0041b0c61363bd57a5cadbe620c4
Author:     Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Tue, 9 Jun 2015 13:20:29 +0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 12 Jun 2015 11:33:51 +0200

iommu: dmar: Extend struct irte for VT-d Posted-Interrupts

The IRTE (Interrupt Remapping Table Entry) is either an entry for
remapped or for posted interrupts. The hardware distiguishes between
remapped and posted entries by bit 15 in the low 64 bit of the
IRTE. If cleared the entry is remapped, if set it's posted.

The entries have common fields and dependent on the posted bit fields
with different meanings.

Extend struct irte to handle the differences between remap and posted
mode by having three structs in the unions:

        - Shared
        - Remapped
        - Posted

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Feng Wu <feng.wu@intel.com>
Acked-by: Joerg Roedel <joro@8bytes.org>
Cc: jiang.liu@linux.intel.com
Cc: iommu@lists.linux-foundation.org
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/1433827237-3382-3-git-send-email-feng.wu@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 include/linux/dmar.h | 70 +++++++++++++++++++++++++++++++++++++++++-----------
 1 file changed, 55 insertions(+), 15 deletions(-)

diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index 8473756..0dbcabc 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -185,33 +185,73 @@ static inline int dmar_device_remove(void *handle)
 
 struct irte {
 	union {
+		/* Shared between remapped and posted mode*/
 		struct {
-			__u64	present 	: 1,
-				fpd		: 1,
-				dst_mode	: 1,
-				redir_hint	: 1,
-				trigger_mode	: 1,
-				dlvry_mode	: 3,
-				avail		: 4,
-				__reserved_1	: 4,
-				vector		: 8,
-				__reserved_2	: 8,
-				dest_id		: 32;
+			__u64	present		: 1,  /*  0      */
+				fpd		: 1,  /*  1      */
+				__res0		: 6,  /*  2 -  6 */
+				avail		: 4,  /*  8 - 11 */
+				__res1		: 3,  /* 12 - 14 */
+				pst		: 1,  /* 15      */
+				vector		: 8,  /* 16 - 23 */
+				__res2		: 40; /* 24 - 63 */
+		};
+
+		/* Remapped mode */
+		struct {
+			__u64	r_present	: 1,  /*  0      */
+				r_fpd		: 1,  /*  1      */
+				dst_mode	: 1,  /*  2      */
+				redir_hint	: 1,  /*  3      */
+				trigger_mode	: 1,  /*  4      */
+				dlvry_mode	: 3,  /*  5 -  7 */
+				r_avail		: 4,  /*  8 - 11 */
+				r_res0		: 4,  /* 12 - 15 */
+				r_vector	: 8,  /* 16 - 23 */
+				r_res1		: 8,  /* 24 - 31 */
+				dest_id		: 32; /* 32 - 63 */
+		};
+
+		/* Posted mode */
+		struct {
+			__u64	p_present	: 1,  /*  0      */
+				p_fpd		: 1,  /*  1      */
+				p_res0		: 6,  /*  2 -  7 */
+				p_avail		: 4,  /*  8 - 11 */
+				p_res1		: 2,  /* 12 - 13 */
+				p_urgent	: 1,  /* 14      */
+				p_pst		: 1,  /* 15      */
+				p_vector	: 8,  /* 16 - 23 */
+				p_res2		: 14, /* 24 - 37 */
+				pda_l		: 26; /* 38 - 63 */
 		};
 		__u64 low;
 	};
 
 	union {
+		/* Shared between remapped and posted mode*/
 		struct {
-			__u64	sid		: 16,
-				sq		: 2,
-				svt		: 2,
-				__reserved_3	: 44;
+			__u64	sid		: 16,  /* 64 - 79  */
+				sq		: 2,   /* 80 - 81  */
+				svt		: 2,   /* 82 - 83  */
+				__res3		: 44;  /* 84 - 127 */
+		};
+
+		/* Posted mode*/
+		struct {
+			__u64	p_sid		: 16,  /* 64 - 79  */
+				p_sq		: 2,   /* 80 - 81  */
+				p_svt		: 2,   /* 82 - 83  */
+				p_res3		: 12,  /* 84 - 95  */
+				pda_h		: 32;  /* 96 - 127 */
 		};
 		__u64 high;
 	};
 };
 
+#define PDA_LOW_BIT    26
+#define PDA_HIGH_BIT   32
+
 enum {
 	IRQ_REMAP_XAPIC_MODE,
 	IRQ_REMAP_X2APIC_MODE,

  reply	other threads:[~2015-06-12  9:49 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-09  5:20 [v10 00/10] Add VT-d Posted-Interrupts support - IOMMU part Feng Wu
2015-06-09  5:20 ` [v10 01/10] iommu: Add new member capability to struct irq_remap_ops Feng Wu
2015-06-12  9:48   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 02/10] iommu: dmar: Extend struct irte for VT-d Posted-Interrupts Feng Wu
2015-06-12  9:48   ` tip-bot for Thomas Gleixner [this message]
2015-06-09  5:20 ` [v10 03/10] iommu: dmar: Provide helper to copy shared irte fields Feng Wu
2015-06-12  9:49   ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2015-06-09  5:20 ` [v10 04/10] iommu, x86: Implement irq_set_vcpu_affinity for intel_ir_chip Feng Wu
2015-06-12  9:49   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 05/10] iommu, x86: Save the mode (posted or remapped) of an IRTE Feng Wu
2015-06-12  9:49   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 06/10] iommu, x86: Avoid migrating VT-d posted interrupts Feng Wu
2015-06-12  9:50   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 07/10] iommu, x86: Add cap_pi_support() to detect VT-d PI capability Feng Wu
2015-06-12  9:50   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 08/10] iommu, x86: Setup Posted-Interrupts capability for Intel iommu Feng Wu
2015-06-12  9:50   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 09/10] iommu, x86: Provide irq_remapping_cap() interface Feng Wu
2015-06-12  9:51   ` [tip:x86/apic] " tip-bot for Feng Wu
2015-06-09  5:20 ` [v10 10/10] iommu, x86: Properly handle posted interrupts for IOMMU hotplug Feng Wu
2015-06-12  9:51   ` [tip:x86/apic] " tip-bot for Feng Wu
  -- strict thread matches above, loose matches on Subject: below --
2015-06-05  5:42 [v9 2/9] iommu: dmar: Extend struct irte for VT-d Posted-Interrupts Feng Wu
2015-06-08 13:43 ` [tip:x86/apic] " tip-bot for Thomas Gleixner

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