From: tip-bot for Dimitri Sivanich <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: luto@amacapital.net, peterz@infradead.org, travis@sgi.com,
tglx@linutronix.de, rja@sgi.com, nzimmer@sgi.com,
akpm@linux-foundation.org, gfk@sgi.com, brgerst@gmail.com,
linux-kernel@vger.kernel.org, estabrook@sgi.com, hpa@zytor.com,
dvlasenk@redhat.com, mingo@kernel.org,
torvalds@linux-foundation.org, abanman@sgi.com, sivanich@sgi.com,
bp@alien8.de, len.brown@intel.com
Subject: [tip:x86/platform] x86/platform/UV: Remove Obsolete GRU MMR address translation
Date: Wed, 4 May 2016 00:22:23 -0700 [thread overview]
Message-ID: <tip-40bfb8eedf1e7fa0535c685ff1000c05bcf7a637@git.kernel.org> (raw)
In-Reply-To: <20160429215406.012228480@asylum.americas.sgi.com>
Commit-ID: 40bfb8eedf1e7fa0535c685ff1000c05bcf7a637
Gitweb: http://git.kernel.org/tip/40bfb8eedf1e7fa0535c685ff1000c05bcf7a637
Author: Dimitri Sivanich <sivanich@sgi.com>
AuthorDate: Fri, 29 Apr 2016 16:54:22 -0500
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 4 May 2016 08:48:51 +0200
x86/platform/UV: Remove Obsolete GRU MMR address translation
Use no-op messages in place of cross-partition interrupts when nacking a
put message in the GRU. This allows us to remove MMR's as a destination
from the GRU driver.
Tested-by: John Estabrook <estabrook@sgi.com>
Tested-by: Gary Kroening <gfk@sgi.com>
Tested-by: Nathan Zimmer <nzimmer@sgi.com>
Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
Signed-off-by: Mike Travis <travis@sgi.com>
Cc: Andrew Banman <abanman@sgi.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russ Anderson <rja@sgi.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160429215406.012228480@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/include/asm/uv/uv_hub.h | 10 ----------
drivers/misc/sgi-gru/grukservices.c | 38 +++++++++++++++++++++----------------
2 files changed, 22 insertions(+), 26 deletions(-)
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index ae979f7..097b80c 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -647,16 +647,6 @@ static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset
return readq(uv_global_mmr64_address(pnode, offset));
}
-/*
- * Global MMR space addresses when referenced by the GRU. (GRU does
- * NOT use socket addressing).
- */
-static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long offset)
-{
- return UV_GLOBAL_GRU_MMR_BASE | offset |
- ((unsigned long)pnode << uv_hub_info->m_val);
-}
-
static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val)
{
writeb(val, uv_global_mmr64_address(pnode, offset));
diff --git a/drivers/misc/sgi-gru/grukservices.c b/drivers/misc/sgi-gru/grukservices.c
index 967b9dd..0307690 100644
--- a/drivers/misc/sgi-gru/grukservices.c
+++ b/drivers/misc/sgi-gru/grukservices.c
@@ -718,8 +718,8 @@ cberr:
static int send_message_put_nacked(void *cb, struct gru_message_queue_desc *mqd,
void *mesg, int lines)
{
- unsigned long m, *val = mesg, gpa, save;
- int ret;
+ unsigned long m;
+ int ret, loops = 200; /* experimentally determined */
m = mqd->mq_gpa + (gru_get_amo_value_head(cb) << 6);
if (lines == 2) {
@@ -735,22 +735,28 @@ static int send_message_put_nacked(void *cb, struct gru_message_queue_desc *mqd,
return MQE_OK;
/*
- * Send a cross-partition interrupt to the SSI that contains the target
- * message queue. Normally, the interrupt is automatically delivered by
- * hardware but some error conditions require explicit delivery.
- * Use the GRU to deliver the interrupt. Otherwise partition failures
+ * Send a noop message in order to deliver a cross-partition interrupt
+ * to the SSI that contains the target message queue. Normally, the
+ * interrupt is automatically delivered by hardware following mesq
+ * operations, but some error conditions require explicit delivery.
+ * The noop message will trigger delivery. Otherwise partition failures
* could cause unrecovered errors.
*/
- gpa = uv_global_gru_mmr_address(mqd->interrupt_pnode, UVH_IPI_INT);
- save = *val;
- *val = uv_hub_ipi_value(mqd->interrupt_apicid, mqd->interrupt_vector,
- dest_Fixed);
- gru_vstore_phys(cb, gpa, gru_get_tri(mesg), IAA_REGISTER, IMA);
- ret = gru_wait(cb);
- *val = save;
- if (ret != CBS_IDLE)
- return MQE_UNEXPECTED_CB_ERR;
- return MQE_OK;
+ do {
+ ret = send_noop_message(cb, mqd, mesg);
+ } while ((ret == MQIE_AGAIN || ret == MQE_CONGESTION) && (loops-- > 0));
+
+ if (ret == MQIE_AGAIN || ret == MQE_CONGESTION) {
+ /*
+ * Don't indicate to the app to resend the message, as it's
+ * already been successfully sent. We simply send an OK
+ * (rather than fail the send with MQE_UNEXPECTED_CB_ERR),
+ * assuming that the other side is receiving enough
+ * interrupts to get this message processed anyway.
+ */
+ ret = MQE_OK;
+ }
+ return ret;
}
/*
next prev parent reply other threads:[~2016-05-04 7:23 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-29 21:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-29 21:54 ` [PATCH 01/21] X86_64, UV: Add Initial UV4 definitions Mike Travis
2016-05-04 7:15 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 02/21] X86_64, UV: Add UV Architecture Defines Mike Travis
2016-05-04 7:15 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 03/21] X86_64, UV: Add UV4 Specific Defines Mike Travis
2016-05-04 7:16 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 04/21] X86_64, UV: Add UV MMR Illegal Access Function Mike Travis
2016-05-04 7:16 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 05/21] X86_64, UV: Prep for UV4 MMR updates Mike Travis
2016-05-04 7:16 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 06/21] X86_64, UV: Add UV4 Specific MMR definitions Mike Travis
2016-05-04 7:17 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 07/21] X86_64, UV: Disable Obsolete APIC ID fixup code used only on UV1 Mike Travis
2016-05-03 7:35 ` Ingo Molnar
2016-05-03 14:43 ` Mike Travis
2016-04-29 21:54 ` [PATCH 08/21] X86_64, UV: Clean up redunduncies after merge of UV4 MMR definitions Mike Travis
2016-05-04 7:17 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 09/21] X86_64, UV: Update MMIOH setup function to work for both UV3 and UV4 Mike Travis
2016-05-04 7:18 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs Mike Travis
2016-05-04 7:18 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 11/21] X86_64, UV: Move scir info to the per cpu info struct Mike Travis
2016-05-04 7:18 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 12/21] X86_64, UV: Move blade local processor ID " Mike Travis
2016-05-04 7:19 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 13/21] X86_64, UV: Allocate common per node hub info structs on local node Mike Travis
2016-05-04 7:19 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 14/21] X86_64, UV: Fold blade info into per node hub info structs Mike Travis
2016-05-04 7:19 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 15/21] X86_64, UV: Add UV4 addressing discovery function Mike Travis
2016-05-04 7:20 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 16/21] X86_64, UV: Add obtaining GAM Range Table from UV BIOS Mike Travis
2016-05-04 7:20 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 17/21] X86_64, UV: Support UV4 socket address changes Mike Travis
2016-05-04 7:21 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 18/21] X86_64, UV: Build GAM reference tables Mike Travis
2016-05-04 7:21 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 19/21] X86_64, UV: Update physical address conversions for UV4 Mike Travis
2016-05-04 7:21 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation Mike Travis
2016-05-04 7:22 ` tip-bot for Dimitri Sivanich [this message]
2016-04-29 21:54 ` [PATCH 21/21] X86_64, UV: Fix incorrect nodes and pnodes for cpuless and memoryless nodes Mike Travis
2016-05-04 7:22 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Dimitri Sivanich
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