From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751596AbdGRLK2 (ORCPT ); Tue, 18 Jul 2017 07:10:28 -0400 Received: from terminus.zytor.com ([65.50.211.136]:41847 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751378AbdGRLK0 (ORCPT ); Tue, 18 Jul 2017 07:10:26 -0400 Date: Tue, 18 Jul 2017 03:57:29 -0700 From: tip-bot for Tom Lendacky Message-ID: Cc: pbonzini@redhat.com, bp@alien8.de, dyoung@redhat.com, glider@google.com, konrad.wilk@oracle.com, arnd@arndb.de, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, dvyukov@google.com, lwoodman@redhat.com, aryabinin@virtuozzo.com, riel@redhat.com, peterz@infradead.org, brijesh.singh@amd.com, mingo@kernel.org, toshi.kani@hpe.com, thomas.lendacky@amd.com, corbet@lwn.net, hpa@zytor.com, bp@suse.de, rkrcmar@redhat.com, matt@codeblueprint.co.uk, mst@redhat.com, tglx@linutronix.de, luto@kernel.org Reply-To: aryabinin@virtuozzo.com, riel@redhat.com, peterz@infradead.org, lwoodman@redhat.com, dvyukov@google.com, linux-kernel@vger.kernel.org, thomas.lendacky@amd.com, toshi.kani@hpe.com, brijesh.singh@amd.com, mingo@kernel.org, corbet@lwn.net, hpa@zytor.com, rkrcmar@redhat.com, bp@suse.de, luto@kernel.org, tglx@linutronix.de, mst@redhat.com, matt@codeblueprint.co.uk, pbonzini@redhat.com, bp@alien8.de, dyoung@redhat.com, glider@google.com, konrad.wilk@oracle.com, arnd@arndb.de, torvalds@linux-foundation.org In-Reply-To: <37e29b99c395910f56ca9f8ecf7b0439b28827c8.1500319216.git.thomas.lendacky@amd.com> References: <37e29b99c395910f56ca9f8ecf7b0439b28827c8.1500319216.git.thomas.lendacky@amd.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/mm] x86/boot/realmode: Check for memory encryption on the APs Git-Commit-ID: 46d010e04a637ca5bbdd0ff72554d9c06f2961c9 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 46d010e04a637ca5bbdd0ff72554d9c06f2961c9 Gitweb: http://git.kernel.org/tip/46d010e04a637ca5bbdd0ff72554d9c06f2961c9 Author: Tom Lendacky AuthorDate: Mon, 17 Jul 2017 16:10:25 -0500 Committer: Ingo Molnar CommitDate: Tue, 18 Jul 2017 11:38:04 +0200 x86/boot/realmode: Check for memory encryption on the APs Add support to check if memory encryption is active in the kernel and that it has been enabled on the AP. If memory encryption is active in the kernel but has not been enabled on the AP, then set the memory encryption bit (bit 23) of MSR_K8_SYSCFG to enable memory encryption on that AP and allow the AP to continue start up. Signed-off-by: Tom Lendacky Reviewed-by: Thomas Gleixner Reviewed-by: Borislav Petkov Cc: Alexander Potapenko Cc: Andrey Ryabinin Cc: Andy Lutomirski Cc: Arnd Bergmann Cc: Borislav Petkov Cc: Brijesh Singh Cc: Dave Young Cc: Dmitry Vyukov Cc: Jonathan Corbet Cc: Konrad Rzeszutek Wilk Cc: Larry Woodman Cc: Linus Torvalds Cc: Matt Fleming Cc: Michael S. Tsirkin Cc: Paolo Bonzini Cc: Peter Zijlstra Cc: Radim Krčmář Cc: Rik van Riel Cc: Toshimitsu Kani Cc: kasan-dev@googlegroups.com Cc: kvm@vger.kernel.org Cc: linux-arch@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-efi@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/37e29b99c395910f56ca9f8ecf7b0439b28827c8.1500319216.git.thomas.lendacky@amd.com Signed-off-by: Ingo Molnar --- arch/x86/include/asm/realmode.h | 12 ++++++++++++ arch/x86/realmode/init.c | 4 ++++ arch/x86/realmode/rm/trampoline_64.S | 24 ++++++++++++++++++++++++ 3 files changed, 40 insertions(+) diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h index 230e190..90d9152 100644 --- a/arch/x86/include/asm/realmode.h +++ b/arch/x86/include/asm/realmode.h @@ -1,6 +1,15 @@ #ifndef _ARCH_X86_REALMODE_H #define _ARCH_X86_REALMODE_H +/* + * Flag bit definitions for use with the flags field of the trampoline header + * in the CONFIG_X86_64 variant. + */ +#define TH_FLAGS_SME_ACTIVE_BIT 0 +#define TH_FLAGS_SME_ACTIVE BIT(TH_FLAGS_SME_ACTIVE_BIT) + +#ifndef __ASSEMBLY__ + #include #include @@ -38,6 +47,7 @@ struct trampoline_header { u64 start; u64 efer; u32 cr4; + u32 flags; #endif }; @@ -69,4 +79,6 @@ static inline size_t real_mode_size_needed(void) void set_real_mode_mem(phys_addr_t mem, size_t size); void reserve_real_mode(void); +#endif /* __ASSEMBLY__ */ + #endif /* _ARCH_X86_REALMODE_H */ diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index d6ddc7e..1f71980 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -108,6 +108,10 @@ static void __init setup_real_mode(void) trampoline_cr4_features = &trampoline_header->cr4; *trampoline_cr4_features = mmu_cr4_features; + trampoline_header->flags = 0; + if (sme_active()) + trampoline_header->flags |= TH_FLAGS_SME_ACTIVE; + trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); trampoline_pgd[0] = trampoline_pgd_entry.pgd; trampoline_pgd[511] = init_top_pgt[511].pgd; diff --git a/arch/x86/realmode/rm/trampoline_64.S b/arch/x86/realmode/rm/trampoline_64.S index dac7b20..614fd70 100644 --- a/arch/x86/realmode/rm/trampoline_64.S +++ b/arch/x86/realmode/rm/trampoline_64.S @@ -30,6 +30,7 @@ #include #include #include +#include #include "realmode.h" .text @@ -92,6 +93,28 @@ ENTRY(startup_32) movl %edx, %fs movl %edx, %gs + /* + * Check for memory encryption support. This is a safety net in + * case BIOS hasn't done the necessary step of setting the bit in + * the MSR for this AP. If SME is active and we've gotten this far + * then it is safe for us to set the MSR bit and continue. If we + * don't we'll eventually crash trying to execute encrypted + * instructions. + */ + bt $TH_FLAGS_SME_ACTIVE_BIT, pa_tr_flags + jnc .Ldone + movl $MSR_K8_SYSCFG, %ecx + rdmsr + bts $MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax + jc .Ldone + + /* + * Memory encryption is enabled but the SME enable bit for this + * CPU has has not been set. It is safe to set it, so do so. + */ + wrmsr +.Ldone: + movl pa_tr_cr4, %eax movl %eax, %cr4 # Enable PAE mode @@ -147,6 +170,7 @@ GLOBAL(trampoline_header) tr_start: .space 8 GLOBAL(tr_efer) .space 8 GLOBAL(tr_cr4) .space 4 + GLOBAL(tr_flags) .space 4 END(trampoline_header) #include "trampoline_common.S"