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From: tip-bot for Mike Travis <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: brgerst@gmail.com, gfk@sgi.com, peterz@infradead.org,
	luto@amacapital.net, estabrook@sgi.com, tglx@linutronix.de,
	len.brown@intel.com, abanman@sgi.com, bp@alien8.de,
	mingo@kernel.org, dvlasenk@redhat.com, rja@sgi.com,
	travis@sgi.com, nzimmer@sgi.com, sivanich@sgi.com,
	linux-kernel@vger.kernel.org, torvalds@linux-foundation.org,
	akpm@linux-foundation.org, hpa@zytor.com
Subject: [tip:x86/platform] x86/platform/UV: Move blade local processor ID to the per cpu info struct
Date: Wed, 4 May 2016 00:19:12 -0700	[thread overview]
Message-ID: <tip-5627a8251f7861175b193a44dc3d8cb478d1135a@git.kernel.org> (raw)
In-Reply-To: <20160429215404.644173122@asylum.americas.sgi.com>

Commit-ID:  5627a8251f7861175b193a44dc3d8cb478d1135a
Gitweb:     http://git.kernel.org/tip/5627a8251f7861175b193a44dc3d8cb478d1135a
Author:     Mike Travis <travis@sgi.com>
AuthorDate: Fri, 29 Apr 2016 16:54:14 -0500
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 4 May 2016 08:48:49 +0200

x86/platform/UV: Move blade local processor ID to the per cpu info struct

Move references to blade local processor ID to the new per cpu info
structs.  Create an access function that makes this move, and other
potential moves opaque to callers of this function.  Define a flag
that indicates to callers in external GPL modules that this function
replaces any local definition.  This allows calling source code to be
built for both pre-UV4 kernels as well as post-UV4 kernels.

Tested-by: John Estabrook <estabrook@sgi.com>
Tested-by: Gary Kroening <gfk@sgi.com>
Tested-by: Nathan Zimmer <nzimmer@sgi.com>
Signed-off-by: Mike Travis <travis@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Cc: Andrew Banman <abanman@sgi.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russ Anderson <rja@sgi.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160429215404.644173122@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/uv/uv_hub.h   | 10 ++++++++--
 arch/x86/kernel/apic/x2apic_uv_x.c |  2 +-
 arch/x86/platform/uv/tlb_uv.c      |  3 ++-
 arch/x86/platform/uv/uv_time.c     |  6 +++---
 4 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index b8c5a61..4a6f02a 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -159,7 +159,6 @@ struct uv_hub_info_s {
 	unsigned short		pnode_mask;
 	unsigned short		coherency_domain_number;
 	unsigned short		numa_blade_id;
-	unsigned char		blade_processor_id;
 	unsigned char		m_val;
 	unsigned char		n_val;
 };
@@ -572,9 +571,16 @@ extern short uv_possible_blades;
 /* Blade-local cpu number of current cpu. Numbered 0 .. <# cpus on the blade> */
 static inline int uv_blade_processor_id(void)
 {
-	return uv_hub_info->blade_processor_id;
+	return uv_cpu_info->blade_cpu_id;
 }
 
+/* Blade-local cpu number of cpu N. Numbered 0 .. <# cpus on the blade> */
+static inline int uv_cpu_blade_processor_id(int cpu)
+{
+	return uv_cpu_info_per(cpu)->blade_cpu_id;
+}
+#define _uv_cpu_blade_processor_id 1	/* indicate function available */
+
 /* Blade number of current cpu. Numnbered 0 .. <#blades -1> */
 static inline int uv_numa_blade_id(void)
 {
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index c8acda9..69aa2a9 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1055,12 +1055,12 @@ void __init uv_system_init(void)
 
 		uv_cpu_hub_info(cpu)->numa_blade_id = blade;
 		uv_cpu_hub_info(cpu)->pnode = pnode;
-		uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;
 		uv_node_to_blade[nodeid] = blade;
 		uv_cpu_to_blade[cpu] = blade;
 
 		/* Initialize per cpu info list */
 		uv_cpu_info_per(cpu)->p_uv_hub_info = uv_cpu_hub_info(cpu);
+		uv_cpu_info_per(cpu)->blade_cpu_id = lcpu;
 		uv_cpu_info_per(cpu)->scir.offset = uv_scir_offset(apicid);
 	}
 
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 534ab94..fdb4d42 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -2040,7 +2040,8 @@ static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
 			return 1;
 		}
 		bcp->uvhub_master = *hmasterp;
-		bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+		bcp->uvhub_cpu = uv_cpu_blade_processor_id(cpu);
+
 		if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
 			printk(KERN_EMERG "%d cpus per uvhub invalid\n",
 				bcp->uvhub_cpu);
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index 2b158a9..b333fc4 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -165,7 +165,7 @@ static __init int uv_rtc_allocate_timers(void)
 	for_each_present_cpu(cpu) {
 		int nid = cpu_to_node(cpu);
 		int bid = uv_cpu_to_blade_id(cpu);
-		int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+		int bcpu = uv_cpu_blade_processor_id(cpu);
 		struct uv_rtc_timer_head *head = blade_info[bid];
 
 		if (!head) {
@@ -226,7 +226,7 @@ static int uv_rtc_set_timer(int cpu, u64 expires)
 	int pnode = uv_cpu_to_pnode(cpu);
 	int bid = uv_cpu_to_blade_id(cpu);
 	struct uv_rtc_timer_head *head = blade_info[bid];
-	int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+	int bcpu = uv_cpu_blade_processor_id(cpu);
 	u64 *t = &head->cpu[bcpu].expires;
 	unsigned long flags;
 	int next_cpu;
@@ -262,7 +262,7 @@ static int uv_rtc_unset_timer(int cpu, int force)
 	int pnode = uv_cpu_to_pnode(cpu);
 	int bid = uv_cpu_to_blade_id(cpu);
 	struct uv_rtc_timer_head *head = blade_info[bid];
-	int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+	int bcpu = uv_cpu_blade_processor_id(cpu);
 	u64 *t = &head->cpu[bcpu].expires;
 	unsigned long flags;
 	int rc = 0;

  reply	other threads:[~2016-05-04  7:20 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-29 21:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-29 21:54 ` [PATCH 01/21] X86_64, UV: Add Initial UV4 definitions Mike Travis
2016-05-04  7:15   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 02/21] X86_64, UV: Add UV Architecture Defines Mike Travis
2016-05-04  7:15   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 03/21] X86_64, UV: Add UV4 Specific Defines Mike Travis
2016-05-04  7:16   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 04/21] X86_64, UV: Add UV MMR Illegal Access Function Mike Travis
2016-05-04  7:16   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 05/21] X86_64, UV: Prep for UV4 MMR updates Mike Travis
2016-05-04  7:16   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 06/21] X86_64, UV: Add UV4 Specific MMR definitions Mike Travis
2016-05-04  7:17   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 07/21] X86_64, UV: Disable Obsolete APIC ID fixup code used only on UV1 Mike Travis
2016-05-03  7:35   ` Ingo Molnar
2016-05-03 14:43     ` Mike Travis
2016-04-29 21:54 ` [PATCH 08/21] X86_64, UV: Clean up redunduncies after merge of UV4 MMR definitions Mike Travis
2016-05-04  7:17   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 09/21] X86_64, UV: Update MMIOH setup function to work for both UV3 and UV4 Mike Travis
2016-05-04  7:18   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs Mike Travis
2016-05-04  7:18   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 11/21] X86_64, UV: Move scir info to the per cpu info struct Mike Travis
2016-05-04  7:18   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 12/21] X86_64, UV: Move blade local processor ID " Mike Travis
2016-05-04  7:19   ` tip-bot for Mike Travis [this message]
2016-04-29 21:54 ` [PATCH 13/21] X86_64, UV: Allocate common per node hub info structs on local node Mike Travis
2016-05-04  7:19   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 14/21] X86_64, UV: Fold blade info into per node hub info structs Mike Travis
2016-05-04  7:19   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 15/21] X86_64, UV: Add UV4 addressing discovery function Mike Travis
2016-05-04  7:20   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 16/21] X86_64, UV: Add obtaining GAM Range Table from UV BIOS Mike Travis
2016-05-04  7:20   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 17/21] X86_64, UV: Support UV4 socket address changes Mike Travis
2016-05-04  7:21   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 18/21] X86_64, UV: Build GAM reference tables Mike Travis
2016-05-04  7:21   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 19/21] X86_64, UV: Update physical address conversions for UV4 Mike Travis
2016-05-04  7:21   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation Mike Travis
2016-05-04  7:22   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Dimitri Sivanich
2016-04-29 21:54 ` [PATCH 21/21] X86_64, UV: Fix incorrect nodes and pnodes for cpuless and memoryless nodes Mike Travis
2016-05-04  7:22   ` [tip:x86/platform] x86/platform/UV: " tip-bot for Dimitri Sivanich

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