From: tip-bot for Sheng Yang <sheng@linux.intel.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
mtosatti@redhat.com, tglx@linutronix.de, sheng@linux.intel.com,
avi@redhat.com, mingo@elte.hu
Subject: [tip:x86/urgent] x86: Add IA32_TSC_AUX MSR and use it
Date: Wed, 16 Dec 2009 08:20:20 GMT [thread overview]
Message-ID: <tip-5df974009fe513c664303de24725ea0f8b47f12e@git.kernel.org> (raw)
In-Reply-To: <1260942485-19156-4-git-send-email-sheng@linux.intel.com>
Commit-ID: 5df974009fe513c664303de24725ea0f8b47f12e
Gitweb: http://git.kernel.org/tip/5df974009fe513c664303de24725ea0f8b47f12e
Author: Sheng Yang <sheng@linux.intel.com>
AuthorDate: Wed, 16 Dec 2009 13:48:04 +0800
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Wed, 16 Dec 2009 09:02:42 +0100
x86: Add IA32_TSC_AUX MSR and use it
Clean up write_tsc() and write_tscp_aux() by replacing
hardcoded values.
No change in functionality.
Signed-off-by: Sheng Yang <sheng@linux.intel.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
LKML-Reference: <1260942485-19156-4-git-send-email-sheng@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/include/asm/msr.h | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 4ffe09b..ac98d29 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -12,6 +12,7 @@
#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */
#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */
#define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */
+#define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */
/* EFER bits: */
#define _EFER_SCE 0 /* SYSCALL/SYSRET */
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2d228fc..cf985aa 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -240,9 +240,9 @@ do { \
#define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
(u32)((val) >> 32))
-#define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2))
+#define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2))
-#define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
+#define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
struct msr *msrs_alloc(void);
void msrs_free(struct msr *msrs);
parent reply other threads:[~2009-12-16 8:21 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <1260942485-19156-4-git-send-email-sheng@linux.intel.com>]
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