From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752597AbdBJJoI (ORCPT ); Fri, 10 Feb 2017 04:44:08 -0500 Received: from terminus.zytor.com ([65.50.211.136]:55944 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752073AbdBJJni (ORCPT ); Fri, 10 Feb 2017 04:43:38 -0500 Date: Fri, 10 Feb 2017 00:49:16 -0800 From: tip-bot for Thomas Gleixner Message-ID: Cc: peterz@infradead.org, linux-kernel@vger.kernel.org, olof@lixom.net, hpa@zytor.com, tglx@linutronix.de, mingo@kernel.org Reply-To: tglx@linutronix.de, hpa@zytor.com, olof@lixom.net, peterz@infradead.org, linux-kernel@vger.kernel.org, mingo@kernel.org In-Reply-To: <20170209151231.491189912@linutronix.de> References: <20170209151231.491189912@linutronix.de> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/urgent] x86/tsc: Make the TSC ADJUST sanitizing work for tsc_reliable Git-Commit-ID: 5f2e71e71410ecb858cfec184ba092adaca61626 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 5f2e71e71410ecb858cfec184ba092adaca61626 Gitweb: http://git.kernel.org/tip/5f2e71e71410ecb858cfec184ba092adaca61626 Author: Thomas Gleixner AuthorDate: Thu, 9 Feb 2017 16:08:42 +0100 Committer: Thomas Gleixner CommitDate: Fri, 10 Feb 2017 09:47:17 +0100 x86/tsc: Make the TSC ADJUST sanitizing work for tsc_reliable When the TSC is marked reliable then the synchronization check is skipped, but that also skips the TSC ADJUST sanitizing code. So on a machine with a wreckaged BIOS the TSC deviation between CPUs might go unnoticed. Let the TSC adjust sanitizing code run unconditionally and just skip the expensive synchronization checks when TSC is marked reliable. Signed-off-by: Thomas Gleixner Cc: Peter Zijlstra Cc: Olof Johansson Link: http://lkml.kernel.org/r/20170209151231.491189912@linutronix.de Signed-off-by: Thomas Gleixner --- arch/x86/kernel/tsc_sync.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c index d0db011..728f753 100644 --- a/arch/x86/kernel/tsc_sync.c +++ b/arch/x86/kernel/tsc_sync.c @@ -286,13 +286,6 @@ void check_tsc_sync_source(int cpu) if (unsynchronized_tsc()) return; - if (tsc_clocksource_reliable) { - if (cpu == (nr_cpu_ids-1) || system_state != SYSTEM_BOOTING) - pr_info( - "Skipped synchronization checks as TSC is reliable.\n"); - return; - } - /* * Set the maximum number of test runs to * 1 if the CPU does not provide the TSC_ADJUST MSR @@ -380,14 +373,19 @@ void check_tsc_sync_target(void) int cpus = 2; /* Also aborts if there is no TSC. */ - if (unsynchronized_tsc() || tsc_clocksource_reliable) + if (unsynchronized_tsc()) return; /* * Store, verify and sanitize the TSC adjust register. If * successful skip the test. + * + * The test is also skipped when the TSC is marked reliable. This + * is true for SoCs which have no fallback clocksource. On these + * SoCs the TSC is frequency synchronized, but still the TSC ADJUST + * register might have been wreckaged by the BIOS.. */ - if (tsc_store_and_check_tsc_adjust(false)) { + if (tsc_store_and_check_tsc_adjust(false) || tsc_clocksource_reliable) { atomic_inc(&skip_test); return; }