* [PATCH v2] x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping
@ 2017-10-11 21:16 Len Brown
2017-10-12 15:13 ` [tip:x86/urgent] " tip-bot for Len Brown
0 siblings, 1 reply; 2+ messages in thread
From: Len Brown @ 2017-10-11 21:16 UTC (permalink / raw)
To: peterz; +Cc: x86, linux-kernel, Len Brown
From: Len Brown <len.brown@intel.com>
SKX stepping-3 fixed the TSC_DEADLINE issue in a different ucode
version number than stepping-4. Linux needs to know this stepping-3
specific version number to also enable the TSC_DEADLINE on stepping-3.
The steppings and ucode versions are documented in the SKX BIOS update:
https://downloadmirror.intel.com/26978/eng/ReleaseNotes_R00.01.0004.txt
Signed-off-by: Len Brown <len.brown@intel.com>
---
wups, clicked send too quick on previous version, which
had HSX in the commit message, rather than SKX.
Peterz,
as this is a patch to your patch, appreciate your ack.
thanks,
-Len
---
arch/x86/kernel/apic/apic.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index d705c769f77d..da13b6abef2c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -573,11 +573,21 @@ static u32 bdx_deadline_rev(void)
return ~0U;
}
+static u32 skx_deadline_rev(void)
+{
+ switch (boot_cpu_data.x86_mask) {
+ case 0x03: return 0x01000136;
+ case 0x04: return 0x02000014;
+ }
+
+ return ~0U;
+}
+
static const struct x86_cpu_id deadline_match[] = {
DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X, hsx_deadline_rev),
DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X, 0x0b000020),
DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D, bdx_deadline_rev),
- DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_X, 0x02000014),
+ DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X, skx_deadline_rev),
DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_CORE, 0x22),
DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_ULT, 0x20),
--
2.14.0-rc0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [tip:x86/urgent] x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping
2017-10-11 21:16 [PATCH v2] x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping Len Brown
@ 2017-10-12 15:13 ` tip-bot for Len Brown
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot for Len Brown @ 2017-10-12 15:13 UTC (permalink / raw)
To: linux-tip-commits; +Cc: tglx, hpa, mingo, len.brown, linux-kernel
Commit-ID: 616dd5872e52493863b0202632703eebd51243dc
Gitweb: https://git.kernel.org/tip/616dd5872e52493863b0202632703eebd51243dc
Author: Len Brown <len.brown@intel.com>
AuthorDate: Wed, 11 Oct 2017 17:16:04 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 12 Oct 2017 17:10:11 +0200
x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping
SKX stepping-3 fixed the TSC_DEADLINE issue in a different ucode
version number than stepping-4. Linux needs to know this stepping-3
specific version number to also enable the TSC_DEADLINE on stepping-3.
The steppings and ucode versions are documented in the SKX BIOS update:
https://downloadmirror.intel.com/26978/eng/ReleaseNotes_R00.01.0004.txt
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: peterz@infradead.org
Link: https://lkml.kernel.org/r/60f2bbf7cf617e212b522e663f84225bfebc50e5.1507756305.git.len.brown@intel.com
---
arch/x86/kernel/apic/apic.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 50109ea..ff89177 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -573,11 +573,21 @@ static u32 bdx_deadline_rev(void)
return ~0U;
}
+static u32 skx_deadline_rev(void)
+{
+ switch (boot_cpu_data.x86_mask) {
+ case 0x03: return 0x01000136;
+ case 0x04: return 0x02000014;
+ }
+
+ return ~0U;
+}
+
static const struct x86_cpu_id deadline_match[] = {
DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X, hsx_deadline_rev),
DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X, 0x0b000020),
DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D, bdx_deadline_rev),
- DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_X, 0x02000014),
+ DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X, skx_deadline_rev),
DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_CORE, 0x22),
DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_ULT, 0x20),
^ permalink raw reply related [flat|nested] 2+ messages in thread
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