From: tip-bot for Lin Ming <ming.m.lin@intel.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
a.p.zijlstra@chello.nl, ming.m.lin@intel.com, tglx@linutronix.de,
mingo@elte.hu
Subject: [tip:perf/core] perf: Avoid the percore allocations if the CPU is not HT capable
Date: Sat, 5 Mar 2011 15:52:46 GMT [thread overview]
Message-ID: <tip-6909262429b70a162e9e7053672cfd8024c9275d@git.kernel.org> (raw)
In-Reply-To: <1299119690-13991-5-git-send-email-ming.m.lin@intel.com>
Commit-ID: 6909262429b70a162e9e7053672cfd8024c9275d
Gitweb: http://git.kernel.org/tip/6909262429b70a162e9e7053672cfd8024c9275d
Author: Lin Ming <ming.m.lin@intel.com>
AuthorDate: Thu, 3 Mar 2011 10:34:50 +0800
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Sat, 5 Mar 2011 07:12:16 +0100
perf: Avoid the percore allocations if the CPU is not HT capable
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1299119690-13991-5-git-send-email-ming.m.lin@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/include/asm/smp.h | 10 ++++++++++
arch/x86/kernel/cpu/perf_event.c | 1 +
arch/x86/kernel/cpu/perf_event_intel.c | 18 ++++++++++++------
3 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 1f46951..c1bbfa8 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -17,10 +17,20 @@
#endif
#include <asm/thread_info.h>
#include <asm/cpumask.h>
+#include <asm/cpufeature.h>
extern int smp_num_siblings;
extern unsigned int num_processors;
+static inline bool cpu_has_ht_siblings(void)
+{
+ bool has_siblings = false;
+#ifdef CONFIG_SMP
+ has_siblings = cpu_has_ht && smp_num_siblings > 1;
+#endif
+ return has_siblings;
+}
+
DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
DECLARE_PER_CPU(u16, cpu_llc_id);
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 4d6ce5d..2660418 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -30,6 +30,7 @@
#include <asm/stacktrace.h>
#include <asm/nmi.h>
#include <asm/compat.h>
+#include <asm/smp.h>
#if 0
#undef wrmsrl
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 6e9b676..8fc2b2c 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1205,6 +1205,9 @@ static int intel_pmu_cpu_prepare(int cpu)
{
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
+ if (!cpu_has_ht_siblings())
+ return NOTIFY_OK;
+
cpuc->per_core = kzalloc_node(sizeof(struct intel_percore),
GFP_KERNEL, cpu_to_node(cpu));
if (!cpuc->per_core)
@@ -1221,6 +1224,15 @@ static void intel_pmu_cpu_starting(int cpu)
int core_id = topology_core_id(cpu);
int i;
+ init_debug_store_on_cpu(cpu);
+ /*
+ * Deal with CPUs that don't clear their LBRs on power-up.
+ */
+ intel_pmu_lbr_reset();
+
+ if (!cpu_has_ht_siblings())
+ return;
+
for_each_cpu(i, topology_thread_cpumask(cpu)) {
struct intel_percore *pc = per_cpu(cpu_hw_events, i).per_core;
@@ -1233,12 +1245,6 @@ static void intel_pmu_cpu_starting(int cpu)
cpuc->per_core->core_id = core_id;
cpuc->per_core->refcnt++;
-
- init_debug_store_on_cpu(cpu);
- /*
- * Deal with CPUs that don't clear their LBRs on power-up.
- */
- intel_pmu_lbr_reset();
}
static void intel_pmu_cpu_dying(int cpu)
next prev parent reply other threads:[~2011-03-05 15:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-03 2:34 [PATCH v3 0/4] perf: offcore event monitoring patches Lin Ming
2011-03-03 2:34 ` [PATCH v3 1/4] perf: Add support for supplementary event registers Lin Ming
2011-03-03 2:34 ` [PATCH v3 2/4] perf: Fix LLC-* events on Intel Nehalem/Westmere Lin Ming
2011-03-03 2:34 ` [PATCH v3 3/4] perf: Add support to the perf tool to specify extra values Lin Ming
2011-03-03 2:34 ` [PATCH v3 4/4] perf: Avoid the percore allocations if HT is not capable Lin Ming
2011-03-04 13:04 ` [tip:perf/core] perf: Avoid the percore allocations if the CPU is not HT capable tip-bot for Lin Ming
2011-03-05 15:52 ` tip-bot for Lin Ming [this message]
2011-03-04 11:53 ` [tip:perf/core] perf: Fix LLC-* events on Intel Nehalem/Westmere tip-bot for Andi Kleen
2011-05-06 9:43 ` [tip:perf/urgent] perf events, x86: Fix Intel Nehalem and Westmere last level cache event definitions tip-bot for Peter Zijlstra
2011-03-04 11:53 ` [tip:perf/core] perf: Add support for supplementary event registers tip-bot for Andi Kleen
2011-03-03 10:14 ` [PATCH v3 0/4] perf: offcore event monitoring patches Peter Zijlstra
2011-03-04 1:16 ` Lin Ming
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