From: tip-bot for Alex Shi <alex.shi@intel.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@kernel.org,
alex.shi@intel.com, tglx@linutronix.de
Subject: [tip:x86/mm] mm/mmu_gather: enable tlb flush range in generic mmu_gather
Date: Tue, 26 Jun 2012 08:17:21 -0700 [thread overview]
Message-ID: <tip-6d80ee50c281d02be090cf429294b32dab0b23b7@git.kernel.org> (raw)
In-Reply-To: <1340604507-11214-7-git-send-email-alex.shi@intel.com>
Commit-ID: 6d80ee50c281d02be090cf429294b32dab0b23b7
Gitweb: http://git.kernel.org/tip/6d80ee50c281d02be090cf429294b32dab0b23b7
Author: Alex Shi <alex.shi@intel.com>
AuthorDate: Mon, 25 Jun 2012 14:08:24 +0800
Committer: H. Peter Anvin <hpa@zytor.com>
CommitDate: Mon, 25 Jun 2012 20:53:19 -0700
mm/mmu_gather: enable tlb flush range in generic mmu_gather
This patch enabled the tlb flush range support in generic mmu layer.
Most of arch has self tlb flush range support, like ARM/IA64 etc.
X86 arch has no this support in hardware yet. But another instruction
'invlpg' can implement this function in some degree. So, enable this
feather in generic layer for x86 now. and maybe useful for other archs
in further.
Generic mmu_gather struct is protected by macro
HAVE_GENERIC_MMU_GATHER. Other archs that has flush range supported
own self mmu_gather struct. So, now this change is safe for them.
In future we may unify this struct and related functions on multiple
archs.
Thanks for Peter Zijlstra time and time reminder for multiple
architecture code safe!
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340604507-11214-7-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
---
include/asm-generic/tlb.h | 2 ++
mm/memory.c | 9 +++++++++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
index 75e888b..ed6642a 100644
--- a/include/asm-generic/tlb.h
+++ b/include/asm-generic/tlb.h
@@ -86,6 +86,8 @@ struct mmu_gather {
#ifdef CONFIG_HAVE_RCU_TABLE_FREE
struct mmu_table_batch *batch;
#endif
+ unsigned long start;
+ unsigned long end;
unsigned int need_flush : 1, /* Did free PTEs */
fast_mode : 1; /* No batching */
diff --git a/mm/memory.c b/mm/memory.c
index 1b7dc66..32c9943 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -206,6 +206,8 @@ void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, bool fullmm)
tlb->mm = mm;
tlb->fullmm = fullmm;
+ tlb->start = -1UL;
+ tlb->end = 0;
tlb->need_flush = 0;
tlb->fast_mode = (num_possible_cpus() == 1);
tlb->local.next = NULL;
@@ -248,6 +250,8 @@ void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long e
{
struct mmu_gather_batch *batch, *next;
+ tlb->start = start;
+ tlb->end = end;
tlb_flush_mmu(tlb);
/* keep the page table cache within bounds */
@@ -1204,6 +1208,11 @@ again:
*/
if (force_flush) {
force_flush = 0;
+
+#ifdef HAVE_GENERIC_MMU_GATHER
+ tlb->start = addr;
+ tlb->end = end;
+#endif
tlb_flush_mmu(tlb);
if (addr != end)
goto again;
next prev parent reply other threads:[~2012-06-26 15:17 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-25 6:08 [PATCH v9 0/9] x86 tlb optimisation and clean up Alex Shi
2012-06-25 6:08 ` [PATCH v9 1/9] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-06-26 15:13 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 2/9] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-06-26 15:13 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 3/9] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
2012-06-26 15:14 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 4/9] x86/tlb: add tlb_flushall_shift for specific CPU Alex Shi
2012-06-26 15:15 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 5/9] x86/tlb: add tlb_flushall_shift knob into debugfs Alex Shi
2012-06-26 15:16 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 6/9] mm/mmu_gather: enable tlb flush range in generic mmu_gather Alex Shi
2012-06-26 15:17 ` tip-bot for Alex Shi [this message]
2012-06-25 6:08 ` [PATCH v9 7/9] x86/tlb: enable tlb flush range support for x86 Alex Shi
2012-06-26 15:18 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 8/9] x86/tlb: replace INVALIDATE_TLB_VECTOR by CALL_FUNCTION_VECTOR Alex Shi
2012-06-26 15:19 ` [tip:x86/mm] " tip-bot for Alex Shi
2012-06-25 6:08 ` [PATCH v9 9/9] x86/tlb: do flush_tlb_kernel_range by 'invlpg' Alex Shi
2012-06-26 15:19 ` [tip:x86/mm] " tip-bot for Alex Shi
-- strict thread matches above, loose matches on Subject: below --
2012-06-28 1:02 [PATCH v10 6/9] mm/mmu_gather: enable tlb flush range in generic mmu_gather Alex Shi
2012-06-28 15:42 ` [tip:x86/mm] " tip-bot for Alex Shi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=tip-6d80ee50c281d02be090cf429294b32dab0b23b7@git.kernel.org \
--to=alex.shi@intel.com \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox