From: tip-bot for Borislav Petkov <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: hpa@zytor.com, mingo@kernel.org, tglx@linutronix.de, bp@suse.de,
linux-kernel@vger.kernel.org
Subject: [tip:ras/core] x86/RAS/mce_amd_inj: Fix some W= warnings
Date: Tue, 13 Sep 2016 06:33:56 -0700 [thread overview]
Message-ID: <tip-7cc4ef8ed132e72ba44804cae3ddb2587ff757d6@git.kernel.org> (raw)
In-Reply-To: <20160912075941.24699-16-bp@alien8.de>
Commit-ID: 7cc4ef8ed132e72ba44804cae3ddb2587ff757d6
Gitweb: http://git.kernel.org/tip/7cc4ef8ed132e72ba44804cae3ddb2587ff757d6
Author: Borislav Petkov <bp@suse.de>
AuthorDate: Mon, 12 Sep 2016 09:59:41 +0200
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Tue, 13 Sep 2016 15:23:14 +0200
x86/RAS/mce_amd_inj: Fix some W= warnings
In particular:
arch/x86/ras/mce_amd_inj.c: In function ‘prepare_msrs’:
arch/x86/ras/mce_amd_inj.c:249:13: warning: declaration of ‘i_mce’ shadows a global declaration [-Wshadow]
struct mce i_mce = *(struct mce *)info;
^~~~~
arch/x86/ras/mce_amd_inj.c: In function ‘init_mce_inject’:
arch/x86/ras/mce_amd_inj.c:453:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(dfs_fls); i++) {
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/20160912075941.24699-16-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/ras/mce_amd_inj.c | 29 ++++++++++++++---------------
1 file changed, 14 insertions(+), 15 deletions(-)
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
index f4b442c..cd318d9 100644
--- a/arch/x86/ras/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -246,28 +246,27 @@ static void toggle_nb_mca_mst_cpu(u16 nid)
static void prepare_msrs(void *info)
{
- struct mce i_mce = *(struct mce *)info;
- u8 b = i_mce.bank;
+ struct mce m = *(struct mce *)info;
+ u8 b = m.bank;
- wrmsrl(MSR_IA32_MCG_STATUS, i_mce.mcgstatus);
+ wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
if (boot_cpu_has(X86_FEATURE_SMCA)) {
- if (i_mce.inject_flags == DFR_INT_INJ) {
- wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), i_mce.status);
- wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), i_mce.addr);
+ if (m.inject_flags == DFR_INT_INJ) {
+ wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status);
+ wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr);
} else {
- wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), i_mce.status);
- wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), i_mce.addr);
+ wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), m.status);
+ wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr);
}
- wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), i_mce.misc);
- wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), i_mce.synd);
+ wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), m.misc);
+ wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd);
} else {
- wrmsrl(MSR_IA32_MCx_STATUS(b), i_mce.status);
- wrmsrl(MSR_IA32_MCx_ADDR(b), i_mce.addr);
- wrmsrl(MSR_IA32_MCx_MISC(b), i_mce.misc);
+ wrmsrl(MSR_IA32_MCx_STATUS(b), m.status);
+ wrmsrl(MSR_IA32_MCx_ADDR(b), m.addr);
+ wrmsrl(MSR_IA32_MCx_MISC(b), m.misc);
}
-
}
static void do_inject(void)
@@ -441,7 +440,7 @@ static struct dfs_node {
static int __init init_mce_inject(void)
{
- int i;
+ unsigned int i;
u64 cap;
rdmsrl(MSR_IA32_MCG_CAP, cap);
prev parent reply other threads:[~2016-09-13 13:34 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-12 7:59 [PATCH 00/15] x86/RAS queue for 4.9 Borislav Petkov
2016-09-12 7:59 ` [PATCH 01/15] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks() Borislav Petkov
2016-09-12 7:59 ` [PATCH 02/15] x86/mce: Add support for new MCA_SYND register Borislav Petkov
2016-09-12 7:59 ` [PATCH 03/15] EDAC/mce_amd: Print syndrome register value on SMCA systems Borislav Petkov
2016-09-12 7:59 ` [PATCH 04/15] x86/RAS: Add syndrome support to mce_amd_inj Borislav Petkov
2016-09-12 7:59 ` [PATCH 05/15] x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks Borislav Petkov
2016-09-12 7:59 ` [PATCH 06/15] EDAC/mce_amd: Add missing SMCA error descriptions Borislav Petkov
2016-09-12 7:59 ` [PATCH 07/15] EDAC/mce_amd: Use SMCA prefix for error descriptions arrays Borislav Petkov
2016-09-12 7:59 ` [PATCH 08/15] x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types Borislav Petkov
2016-09-12 7:59 ` [PATCH 09/15] x86/mce/AMD: Update sysfs bank names for SMCA systems Borislav Petkov
2016-09-12 7:59 ` [PATCH 10/15] x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on " Borislav Petkov
2016-09-12 7:59 ` [PATCH 11/15] x86/mce/AMD: Save MCA_IPID in MCE struct " Borislav Petkov
2016-09-12 7:59 ` [PATCH 12/15] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE " Borislav Petkov
2016-09-12 7:59 ` [PATCH 13/15] x86/mce/AMD: Extract the error address " Borislav Petkov
2016-09-12 7:59 ` [PATCH 14/15] x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly Borislav Petkov
2016-09-12 7:59 ` [PATCH 15/15] x86/RAS/mce_amd_inj: Fix some W= warnings Borislav Petkov
2016-09-13 13:33 ` tip-bot for Borislav Petkov [this message]
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