From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754003AbdGXKZ3 (ORCPT ); Mon, 24 Jul 2017 06:25:29 -0400 Received: from terminus.zytor.com ([65.50.211.136]:55849 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752262AbdGXKY4 (ORCPT ); Mon, 24 Jul 2017 06:24:56 -0400 Date: Mon, 24 Jul 2017 03:21:20 -0700 From: tip-bot for Andy Shevchenko Message-ID: Cc: tglx@linutronix.de, peterz@infradead.org, mingo@kernel.org, baolin.wang@spreadtrum.com, mika.westerberg@linux.intel.com, torvalds@linux-foundation.org, hpa@zytor.com, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com Reply-To: andriy.shevchenko@linux.intel.com, linux-kernel@vger.kernel.org, hpa@zytor.com, torvalds@linux-foundation.org, baolin.wang@spreadtrum.com, mika.westerberg@linux.intel.com, tglx@linutronix.de, peterz@infradead.org, mingo@kernel.org In-Reply-To: <20170630170934.83028-6-andriy.shevchenko@linux.intel.com> References: <20170630170934.83028-6-andriy.shevchenko@linux.intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/asm] x86/io: Make readq() / writeq() API consistent Git-Commit-ID: 9683a64fc3cb67e663859a6bb2e0db5dcee9ed32 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 9683a64fc3cb67e663859a6bb2e0db5dcee9ed32 Gitweb: http://git.kernel.org/tip/9683a64fc3cb67e663859a6bb2e0db5dcee9ed32 Author: Andy Shevchenko AuthorDate: Fri, 30 Jun 2017 20:09:34 +0300 Committer: Ingo Molnar CommitDate: Mon, 24 Jul 2017 11:18:21 +0200 x86/io: Make readq() / writeq() API consistent Despite the following commit: 93093d099e5d ("x86: provide readq()/writeq() on 32-bit too, complete") which says: ...Also, map all the APIs to the strongest ordering variant. It's way too easy to mess such details up in drivers and the difference between "memory" and "" constrained asm() constructs is in the noise range. ... we have for now only one user of this API (i.e. writeq_relaxed() in drivers/hwtracing/intel_th/sth.c) on x86 and it does care about "relaxed" part of it. Moreover 32-bit support has been removed from that header, though appeared later in specific headers that emphasizes its non-atomic context. The rest should keep in mind a consistent picture of the __raw_IO() vs. IO() vs. IO_relaxed() API. Signed-off-by: Andy Shevchenko Cc: Baolin Wang Cc: Linus Torvalds Cc: Mika Westerberg Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: intel-gfx@lists.freedesktop.org Cc: linux-i2c@vger.kernel.org Cc: wsa@the-dreams.de Link: http://lkml.kernel.org/r/20170630170934.83028-6-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar --- arch/x86/include/asm/io.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index b3bba2f..9ada93f 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -94,13 +94,15 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #ifdef CONFIG_X86_64 build_mmio_read(readq, "q", unsigned long, "=r", :"memory") +build_mmio_read(__readq, "q", unsigned long, "=r", ) build_mmio_write(writeq, "q", unsigned long, "r", :"memory") +build_mmio_write(__writeq, "q", unsigned long, "r", ) -#define readq_relaxed(a) readq(a) -#define writeq_relaxed(v, a) writeq(v, a) +#define readq_relaxed(a) __readq(a) +#define writeq_relaxed(v, a) __writeq(v, a) -#define __raw_readq(a) readq(a) -#define __raw_writeq(val, addr) writeq(val, addr) +#define __raw_readq __readq +#define __raw_writeq __writeq /* Let people know that we have them */ #define readq readq