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From: tip-bot for Cyrill Gorcunov <gorcunov@openvz.org>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
	gorcunov@openvz.org, peterz@infradead.org, fweisbec@gmail.com,
	rostedt@goodmis.org, ming.m.lin@intel.com, tglx@linutronix.de,
	mingo@elte.hu
Subject: [tip:perf/core] perf, x86: P4_pmu_schedule_events -- use smp_processor_id instead of raw_
Date: Wed, 19 May 2010 07:57:24 GMT	[thread overview]
Message-ID: <tip-9d36dfcf219e2ba1f1d169a7f92dcf2cbd4e05f0@git.kernel.org> (raw)
In-Reply-To: <20100518212439.167259349@openvz.org>

Commit-ID:  9d36dfcf219e2ba1f1d169a7f92dcf2cbd4e05f0
Gitweb:     http://git.kernel.org/tip/9d36dfcf219e2ba1f1d169a7f92dcf2cbd4e05f0
Author:     Cyrill Gorcunov <gorcunov@openvz.org>
AuthorDate: Wed, 19 May 2010 01:19:18 +0400
Committer:  Ingo Molnar <mingo@elte.hu>
CommitDate: Wed, 19 May 2010 09:41:05 +0200

perf, x86: P4_pmu_schedule_events -- use smp_processor_id instead of raw_

This snippet somehow escaped the commit:

 | commit 137351e0feeb9f25d99488ee1afc1c79f5499a9a
 | Author: Cyrill Gorcunov <gorcunov@openvz.org>
 | Date:   Sat May 8 15:25:52 2010 +0400
 |
 |    x86, perf: P4 PMU -- protect sensible procedures from preemption

so bring it eventually back. It helps to catch
preemption issue (if there will be, rule of thumb --
don't use raw_ if you can).

Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <20100518212439.167259349@openvz.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
 arch/x86/kernel/cpu/perf_event_p4.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 5f8e36d..ae85d69 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -763,7 +763,7 @@ static int p4_pmu_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign
 {
 	unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
 	unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)];
-	int cpu = raw_smp_processor_id();
+	int cpu = smp_processor_id();
 	struct hw_perf_event *hwc;
 	struct p4_event_bind *bind;
 	unsigned int i, thread, num;

  reply	other threads:[~2010-05-19  7:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-05-18 21:19 [patch 0/4] [perf -tip/master] p4 pmu updates Cyrill Gorcunov
2010-05-18 21:19 ` [patch 1/4] x86,perf: P4 PMU -- do a real check for ESCR address being in hash Cyrill Gorcunov
2010-05-19  7:57   ` [tip:perf/core] perf, x86: " tip-bot for Cyrill Gorcunov
2010-05-18 21:19 ` [patch 2/4] x86,perf: p4_pmu_schedule_events -- use smp_processor_id instead of raw_ Cyrill Gorcunov
2010-05-19  7:57   ` tip-bot for Cyrill Gorcunov [this message]
2010-05-18 21:19 ` [patch 3/4] x86,perf: P4 PMU -- add missing bit in CCCR mask Cyrill Gorcunov
2010-05-19  7:57   ` [tip:perf/core] perf, x86: " tip-bot for Cyrill Gorcunov
2010-05-18 21:19 ` [patch 4/4] x86,perf: P4 PMU -- prepare header for user-space inclusion Cyrill Gorcunov
2010-05-19  7:35   ` Ingo Molnar
2010-05-19  7:41     ` Cyrill Gorcunov

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