From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757415AbcEEPPz (ORCPT ); Thu, 5 May 2016 11:15:55 -0400 Received: from terminus.zytor.com ([198.137.202.10]:52312 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757173AbcEEPPx (ORCPT ); Thu, 5 May 2016 11:15:53 -0400 Date: Thu, 5 May 2016 08:15:38 -0700 From: tip-bot for Christoph Hellwig Message-ID: Cc: linux-kernel@vger.kernel.org, hch@lst.de, tglx@linutronix.de, hpa@zytor.com, mingo@kernel.org Reply-To: linux-kernel@vger.kernel.org, hch@lst.de, tglx@linutronix.de, hpa@zytor.com, mingo@kernel.org In-Reply-To: <1462459265-20974-1-git-send-email-hch@lst.de> References: <1462459265-20974-1-git-send-email-hch@lst.de> To: linux-tip-commits@vger.kernel.org Subject: [tip:irq/core] irqchip/alpine-msi: Don't use Git-Commit-ID: 9d9b7eed59eb847c229225e6465fc2ead9971902 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 9d9b7eed59eb847c229225e6465fc2ead9971902 Gitweb: http://git.kernel.org/tip/9d9b7eed59eb847c229225e6465fc2ead9971902 Author: Christoph Hellwig AuthorDate: Thu, 5 May 2016 16:41:05 +0200 Committer: Thomas Gleixner CommitDate: Thu, 5 May 2016 17:10:47 +0200 irqchip/alpine-msi: Don't use Signed-off-by: Christoph Hellwig Cc: marc.zyngier@arm.com Cc: antoine.tenart@free-electrons.com Cc: jason@lakedaemon.net Cc: tsahee@annapurnalabs.com Link: http://lkml.kernel.org/r/1462459265-20974-1-git-send-email-hch@lst.de Signed-off-by: Thomas Gleixner --- drivers/irqchip/irq-alpine-msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-alpine-msi.c b/drivers/irqchip/irq-alpine-msi.c index 2538425..63d9809 100644 --- a/drivers/irqchip/irq-alpine-msi.c +++ b/drivers/irqchip/irq-alpine-msi.c @@ -23,7 +23,7 @@ #include #include -#include +#include /* MSIX message address format: local GIC target */ #define ALPINE_MSIX_SPI_TARGET_CLUSTER0 BIT(16)