From: tip-bot for Peter Zijlstra <a.p.zijlstra@chello.nl>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
acme@infradead.org, a.p.zijlstra@chello.nl, tglx@linutronix.de,
mingo@elte.hu
Subject: [tip:perf/pebs] perf, x86: Robustify PEBS fixup
Date: Wed, 10 Mar 2010 13:21:45 GMT [thread overview]
Message-ID: <tip-a562b1871f7f7d2f3a835c3c1e07fa58d473cfb7@git.kernel.org> (raw)
In-Reply-To: <20100305154129.042271287@chello.nl>
Commit-ID: a562b1871f7f7d2f3a835c3c1e07fa58d473cfb7
Gitweb: http://git.kernel.org/tip/a562b1871f7f7d2f3a835c3c1e07fa58d473cfb7
Author: Peter Zijlstra <a.p.zijlstra@chello.nl>
AuthorDate: Fri, 5 Mar 2010 16:29:14 +0100
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Wed, 10 Mar 2010 13:23:35 +0100
perf, x86: Robustify PEBS fixup
It turns out the LBR is massively unreliable on certain CPUs, so code the
fixup a little more defensive to avoid crashing the kernel.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: paulus@samba.org
Cc: eranian@google.com
Cc: robert.richter@amd.com
Cc: fweisbec@gmail.com
LKML-Reference: <20100305154129.042271287@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 21 +++++++++++++++++++--
1 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index a67fff1..e7ac517 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -399,10 +399,23 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
if (!x86_pmu.intel_cap.pebs_trap)
return 1;
+ /*
+ * No LBR entry, no basic block, no rewinding
+ */
if (!cpuc->lbr_stack.nr || !from || !to)
return 0;
- if (ip < to)
+ /*
+ * Basic blocks should never cross user/kernel boundaries
+ */
+ if (kernel_ip(ip) != kernel_ip(to))
+ return 0;
+
+ /*
+ * unsigned math, either ip is before the start (impossible) or
+ * the basic block is larger than 1 page (sanity)
+ */
+ if ((ip - to) > PAGE_SIZE)
return 0;
/*
@@ -420,7 +433,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
old_to = to;
if (!kernel_ip(ip)) {
- int bytes, size = min_t(int, MAX_INSN_SIZE, ip - to);
+ int bytes, size = MAX_INSN_SIZE;
bytes = copy_from_user_nmi(buf, (void __user *)to, size);
if (bytes != size)
@@ -440,6 +453,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
return 1;
}
+ /*
+ * Even though we decoded the basic block, the instruction stream
+ * never matched the given IP, either the TO or the IP got corrupted.
+ */
return 0;
}
prev parent reply other threads:[~2010-03-10 13:22 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-05 15:39 [PATCH 0/5] PEBS and LBR fixes Peter Zijlstra
2010-03-05 15:39 ` [PATCH 1/5] perf: Rework the arch CPU-hotplug hooks Peter Zijlstra
2010-03-10 13:10 ` [tip:perf/urgent] perf: Rework and fix " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 2/5] perf, x86: Fix silly bug in data store buffer allocation Peter Zijlstra
2010-03-10 13:20 ` [tip:perf/pebs] " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 3/5] perf, x86: Disable PEBS on clowertown chips Peter Zijlstra
2010-03-05 18:58 ` Stephane Eranian
2010-03-05 19:15 ` Peter Zijlstra
2010-03-05 19:28 ` Stephane Eranian
2010-03-05 19:37 ` Peter Zijlstra
2010-03-05 21:05 ` Peter Zijlstra
2010-03-05 21:22 ` Stephane Eranian
2010-03-05 21:35 ` Peter Zijlstra
2010-03-05 21:38 ` Stephane Eranian
2010-03-05 21:43 ` Peter Zijlstra
2010-03-05 21:57 ` Stephane Eranian
2010-03-05 22:25 ` Peter Zijlstra
2010-03-05 22:33 ` Stephane Eranian
2010-03-10 13:21 ` [tip:perf/pebs] perf, x86: Disable PEBS on clovertown chips tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 4/5] perf, x86: Clear the LBRs on init Peter Zijlstra
2010-03-10 13:21 ` [tip:perf/pebs] " tip-bot for Peter Zijlstra
2010-03-05 15:39 ` [PATCH 5/5] perf, x86: Robustify PEBS fixup Peter Zijlstra
2010-03-10 13:21 ` tip-bot for Peter Zijlstra [this message]
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