From: tip-bot for Borislav Petkov <borislav.petkov@amd.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@kernel.org,
alex.shi@intel.com, tglx@linutronix.de, borislav.petkov@amd.com
Subject: [tip:x86/mm] x86, cpu: Fixup tlb_flushall_shift formatting
Date: Mon, 6 Aug 2012 20:07:57 -0700 [thread overview]
Message-ID: <tip-a9ad773e0dd833651f0831020a0ea0265c29f2ea@git.kernel.org> (raw)
In-Reply-To: <1344272439-29080-2-git-send-email-bp@amd64.org>
Commit-ID: a9ad773e0dd833651f0831020a0ea0265c29f2ea
Gitweb: http://git.kernel.org/tip/a9ad773e0dd833651f0831020a0ea0265c29f2ea
Author: Borislav Petkov <borislav.petkov@amd.com>
AuthorDate: Mon, 6 Aug 2012 19:00:36 +0200
Committer: H. Peter Anvin <hpa@zytor.com>
CommitDate: Mon, 6 Aug 2012 19:18:09 -0700
x86, cpu: Fixup tlb_flushall_shift formatting
The TLB characteristics appeared like this in dmesg:
[ 0.065817] Last level iTLB entries: 4KB 512, 2MB 1024, 4MB 512
[ 0.065817] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 512
[ 0.065817] tlb_flushall_shift is 0xffffffff
where tlb_flushall_shift is actually -1 but dumped as a hex number.
However, the Kconfig option CONFIG_DEBUG_TLBFLUSH and the rest of the
code treats this as a signed decimal and states "If you set it to -1,
the code flushes the whole TLB unconditionally."
So, fix its formatting in accordance with the other references to it.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Link: http://lkml.kernel.org/r/1344272439-29080-2-git-send-email-bp@amd64.org
Acked-by: Alex Shi <alex.shi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
---
arch/x86/kernel/cpu/common.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 46d8786..d239977 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -474,7 +474,7 @@ void __cpuinit cpu_detect_tlb(struct cpuinfo_x86 *c)
printk(KERN_INFO "Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n" \
"Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d\n" \
- "tlb_flushall_shift is 0x%x\n",
+ "tlb_flushall_shift: %d\n",
tlb_lli_4k[ENTRIES], tlb_lli_2m[ENTRIES],
tlb_lli_4m[ENTRIES], tlb_lld_4k[ENTRIES],
tlb_lld_2m[ENTRIES], tlb_lld_4m[ENTRIES],
next prev parent reply other threads:[~2012-08-07 3:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-06 17:00 [PATCH v1 0/4] x86, CPU: TLB flushall shift, the AMD side Borislav Petkov
2012-08-06 17:00 ` [PATCH v1 1/4] x86, CPU: Fixup tlb_flushall_shift formatting Borislav Petkov
2012-08-07 3:07 ` tip-bot for Borislav Petkov [this message]
2012-08-06 17:00 ` [PATCH v1 2/4] x86, CPU: Push TLB detection CPUID check down Borislav Petkov
2012-08-07 0:35 ` Alex Shi
2012-08-07 3:08 ` [tip:x86/mm] x86, cpu: " tip-bot for Borislav Petkov
2012-08-06 17:00 ` [PATCH v1 3/4] x86, CPU: Add AMD TLB size detection Borislav Petkov
2012-08-07 3:09 ` [tip:x86/mm] x86, cpu: " tip-bot for Borislav Petkov
2012-08-06 17:00 ` [PATCH v1 4/4] x86, CPU: Preset default tlb_flushall_shift on AMD Borislav Petkov
2012-08-07 3:10 ` [tip:x86/mm] x86, cpu: " tip-bot for Borislav Petkov
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