From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757925AbbIVKzc (ORCPT ); Tue, 22 Sep 2015 06:55:32 -0400 Received: from terminus.zytor.com ([198.137.202.10]:47946 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757839AbbIVKza (ORCPT ); Tue, 22 Sep 2015 06:55:30 -0400 Date: Tue, 22 Sep 2015 03:54:55 -0700 From: tip-bot for Geert Uytterhoeven Message-ID: Cc: jason@lakedaemon.net, ijc+devicetree@hellion.org.uk, robh+dt@kernel.org, marc.zyngier@arm.com, geert+renesas@glider.be, mingo@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, mark.rutland@arm.com, tglx@linutronix.de, hpa@zytor.com, linux-kernel@vger.kernel.org Reply-To: pawel.moll@arm.com, mingo@kernel.org, galak@codeaurora.org, hpa@zytor.com, linux-kernel@vger.kernel.org, mark.rutland@arm.com, tglx@linutronix.de, jason@lakedaemon.net, ijc+devicetree@hellion.org.uk, robh+dt@kernel.org, geert+renesas@glider.be, marc.zyngier@arm.com In-Reply-To: <1442261204-30931-3-git-send-email-geert+renesas@glider.be> References: <1442261204-30931-3-git-send-email-geert+renesas@glider.be> To: linux-tip-commits@vger.kernel.org Subject: [tip:irq/core] irqchip/gic: Document optional Clock and Power Domain properties Git-Commit-ID: afbbd23381767aec5717ce07736f3a165ef724cd X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: afbbd23381767aec5717ce07736f3a165ef724cd Gitweb: http://git.kernel.org/tip/afbbd23381767aec5717ce07736f3a165ef724cd Author: Geert Uytterhoeven AuthorDate: Mon, 14 Sep 2015 22:06:44 +0200 Committer: Thomas Gleixner CommitDate: Tue, 22 Sep 2015 12:51:18 +0200 irqchip/gic: Document optional Clock and Power Domain properties Depending on the GIC variant, the GIC module has one or more clock inputs. Document the optional "clocks" and "clock-names" properties, and their possible values, based on the Technical Reference Manuals. optional. Add the optional "power-domains" property. This will allow to describe in DT the relationship between the GIC and the Clock and/or Power Domain topology on SoCs where this is relevant and needed for proper operation. Note: As the current GIC driver doesn't support Runtime PM yet, PM Domain constraints must be handled elsewhere in e.g. platform code. Signed-off-by: Geert Uytterhoeven Acked-by: Rob Herring Cc: linux-arm-kernel@lists.infradead.org Cc: Pawel Moll Cc: Mark Rutland Cc: Kumar Gala Cc: Jason Cooper Cc: Marc Zyngier Cc: Ian Campbell Link: http://lkml.kernel.org/r/1442261204-30931-3-git-send-email-geert%2Brenesas@glider.be Signed-off-by: Thomas Gleixner --- Documentation/devicetree/bindings/arm/gic.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 2474285..cc56021 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -59,6 +59,21 @@ Optional regions, used when the GIC doesn't have banked registers. The offset is cpu-offset * cpu-nr. +- clocks : List of phandle and clock-specific pairs, one for each entry + in clock-names. +- clock-names : List of names for the GIC clock input(s). Valid clock names + depend on the GIC variant: + "ic_clk" (for "arm,arm11mp-gic") + "PERIPHCLKEN" (for "arm,cortex-a15-gic") + "PERIPHCLK", "PERIPHCLKEN" (for "arm,cortex-a9-gic") + "clk" (for "arm,gic-400") + "gclk" (for "arm,pl390") + +- power-domains : A phandle and PM domain specifier as defined by bindings of + the power controller specified by phandle, used when the GIC + is part of a Power or Clock Domain. + + Example: intc: interrupt-controller@fff11000 {