[tip:x86/cpu] x86, cpu: cpu/proc.c display cache alignment and address sizes for 32 bit

[tip-bot for Jaswinder Singh Rajput <jaswinder@kernel.org>]

Commit-ID:  c64b04fe6e0cb7c78e01751a44ef56cf20344e87
Gitweb:     http://git.kernel.org/tip/c64b04fe6e0cb7c78e01751a44ef56cf20344e87
Author:     Jaswinder Singh Rajput <jaswinder@kernel.org>
AuthorDate: Sun, 14 Jun 2009 00:59:50 +0530
Committer:  H. Peter Anvin <hpa@zytor.com>
CommitDate: Sat, 13 Jun 2009 14:00:49 -0700

x86, cpu: cpu/proc.c display cache alignment and address sizes for 32 bit

32 bits can also access x86_cache_alignment, x86_phys_bits and
x86_virt_bits, make them available to user space just as on 64 bits.

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
LKML-Reference: <1244921390.11733.30.camel@ht.satnam>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>


---
 arch/x86/kernel/cpu/proc.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index d5e3039..f82706a 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -116,11 +116,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
 #endif
 	seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
-#ifdef CONFIG_X86_64
 	seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
 	seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
 		   c->x86_phys_bits, c->x86_virt_bits);
-#endif
 
 	seq_printf(m, "power management:");
 	for (i = 0; i < 32; i++) {