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From: tip-bot for Jake Oshins <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: hpa@zytor.com, mingo@kernel.org, jakeo@microsoft.com,
	linux-kernel@vger.kernel.org, tglx@linutronix.de
Subject: [tip:x86/apic] x86/irq: Export functions to allow MSI domains in modules
Date: Sun, 20 Dec 2015 03:45:35 -0800	[thread overview]
Message-ID: <tip-c8f3e518d3444ee9200a4987421fcee60f768f11@git.kernel.org> (raw)
In-Reply-To: <1449769983-12948-4-git-send-email-jakeo@microsoft.com>

Commit-ID:  c8f3e518d3444ee9200a4987421fcee60f768f11
Gitweb:     http://git.kernel.org/tip/c8f3e518d3444ee9200a4987421fcee60f768f11
Author:     Jake Oshins <jakeo@microsoft.com>
AuthorDate: Thu, 10 Dec 2015 17:52:59 +0000
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 20 Dec 2015 12:40:49 +0100

x86/irq: Export functions to allow MSI domains in modules

The Linux kernel already has the concept of IRQ domain, wherein a
component can expose a set of IRQs which are managed by a particular
interrupt controller chip or other subsystem. The PCI driver exposes
the notion of an IRQ domain for Message-Signaled Interrupts (MSI) from
PCI Express devices. This patch exposes the functions which are
necessary for creating a MSI IRQ domain within a module.

[ tglx: Split it into x86 and core irq parts ]

Signed-off-by: Jake Oshins <jakeo@microsoft.com>
Cc: gregkh@linuxfoundation.org
Cc: kys@microsoft.com
Cc: devel@linuxdriverproject.org
Cc: olaf@aepfle.de
Cc: apw@canonical.com
Cc: vkuznets@redhat.com
Cc: haiyangz@microsoft.com
Cc: marc.zyngier@arm.com
Cc: bhelgaas@google.com
Link: http://lkml.kernel.org/r/1449769983-12948-4-git-send-email-jakeo@microsoft.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/msi.h    | 6 ++++++
 arch/x86/kernel/apic/msi.c    | 8 +++++---
 arch/x86/kernel/apic/vector.c | 2 ++
 3 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/msi.h b/arch/x86/include/asm/msi.h
index 93724cc..eb4b09b 100644
--- a/arch/x86/include/asm/msi.h
+++ b/arch/x86/include/asm/msi.h
@@ -1,7 +1,13 @@
 #ifndef _ASM_X86_MSI_H
 #define _ASM_X86_MSI_H
 #include <asm/hw_irq.h>
+#include <asm/irqdomain.h>
 
 typedef struct irq_alloc_info msi_alloc_info_t;
 
+int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
+		    msi_alloc_info_t *arg);
+
+void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc);
+
 #endif /* _ASM_X86_MSI_H */
diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index 5f1feb6..ade2532 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -96,8 +96,8 @@ static irq_hw_number_t pci_msi_get_hwirq(struct msi_domain_info *info,
 	return arg->msi_hwirq;
 }
 
-static int pci_msi_prepare(struct irq_domain *domain, struct device *dev,
-			   int nvec, msi_alloc_info_t *arg)
+int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
+		    msi_alloc_info_t *arg)
 {
 	struct pci_dev *pdev = to_pci_dev(dev);
 	struct msi_desc *desc = first_pci_msi_entry(pdev);
@@ -113,11 +113,13 @@ static int pci_msi_prepare(struct irq_domain *domain, struct device *dev,
 
 	return 0;
 }
+EXPORT_SYMBOL_GPL(pci_msi_prepare);
 
-static void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
+void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
 {
 	arg->msi_hwirq = pci_msi_domain_calc_hwirq(arg->msi_dev, desc);
 }
+EXPORT_SYMBOL_GPL(pci_msi_set_desc);
 
 static struct msi_domain_ops pci_msi_domain_ops = {
 	.get_hwirq	= pci_msi_get_hwirq,
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 861bc59..908cb37 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -29,6 +29,7 @@ struct apic_chip_data {
 };
 
 struct irq_domain *x86_vector_domain;
+EXPORT_SYMBOL_GPL(x86_vector_domain);
 static DEFINE_RAW_SPINLOCK(vector_lock);
 static cpumask_var_t vector_cpumask;
 static struct irq_chip lapic_controller;
@@ -66,6 +67,7 @@ struct irq_cfg *irqd_cfg(struct irq_data *irq_data)
 
 	return data ? &data->cfg : NULL;
 }
+EXPORT_SYMBOL_GPL(irqd_cfg);
 
 struct irq_cfg *irq_cfg(unsigned int irq)
 {

  parent reply	other threads:[~2015-12-20 11:45 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-10 17:52 [PATCH v10 0/7] PCI: hv: New paravirtual PCI front-end for Hyper-V VMs jakeo
2015-12-10 17:52 ` [PATCH v10 1/7] drivers:hv: Export a function that maps Linux CPU num onto Hyper-V proc num jakeo
2015-12-10 17:52 ` [PATCH v10 2/7] drivers:hv: Export hv_do_hypercall() jakeo
2015-12-10 17:52 ` [PATCH v10 3/7] PCI: Make it possible to implement a PCI MSI IRQ Domain in a module jakeo
2015-12-10 18:13   ` Marc Zyngier
2015-12-20 11:30   ` [tip:irq/core] genirq/msi: Export functions to allow MSI domains in modules tip-bot for Jake Oshins
2015-12-20 11:45   ` tip-bot for Jake Oshins [this message]
2015-12-10 17:53 ` [PATCH v10 4/7] PCI: Add fwnode_handle to pci_sysdata jakeo
2015-12-10 18:16   ` Marc Zyngier
2015-12-10 17:53 ` [PATCH v10 5/7] PCI: irqdomain: Look up IRQ domain by fwnode_handle jakeo
2015-12-10 18:12   ` Marc Zyngier
2015-12-10 17:53 ` [PATCH v10 6/7] drivers:hv: Define the channel type of Hyper-V PCI Express pass-through jakeo
2015-12-10 17:53 ` [PATCH v10 7/7] PCI: hv: New paravirtual PCI front-end for Hyper-V VMs jakeo

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