From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752592AbdKHULO (ORCPT ); Wed, 8 Nov 2017 15:11:14 -0500 Received: from terminus.zytor.com ([65.50.211.136]:41459 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752329AbdKHULM (ORCPT ); Wed, 8 Nov 2017 15:11:12 -0500 Date: Wed, 8 Nov 2017 12:10:03 -0800 From: tip-bot for Yonghong Song Message-ID: Cc: hpa@zytor.com, linux-kernel@vger.kernel.org, yhs@fb.com, mingo@kernel.org, tglx@linutronix.de Reply-To: hpa@zytor.com, linux-kernel@vger.kernel.org, yhs@fb.com, tglx@linutronix.de, mingo@kernel.org In-Reply-To: <20171108192845.552709-1-yhs@fb.com> References: <20171108192845.552709-1-yhs@fb.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/urgent] x86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps() Git-Commit-ID: d0cd64b02aa854d68ce517cb7da1fe4e4fff2653 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: d0cd64b02aa854d68ce517cb7da1fe4e4fff2653 Gitweb: https://git.kernel.org/tip/d0cd64b02aa854d68ce517cb7da1fe4e4fff2653 Author: Yonghong Song AuthorDate: Wed, 8 Nov 2017 11:28:45 -0800 Committer: Thomas Gleixner CommitDate: Wed, 8 Nov 2017 21:05:23 +0100 x86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps() Commit b70543a0b2b6("x86/idt: Move regular trap init to tables") moves regular trap init for each trap vector into a table based initialization. It introduced the initialization for vector X86_TRAP_BP which was not in the code which it replaced. This breaks uprobe functionality for x86_32; the probed program segfaults instead of handling the probe proper. The reason for this is that TRAP_BP is set up as system interrupt gate (DPL3) in the early IDT and then replaced by a regular interrupt gate (DPL0) in idt_setup_traps(). The DPL0 restriction causes the int3 trap to fail with a #GP resulting in a SIGSEGV of the probed program. On 64bit this does not cause a problem because the IDT entry is replaced with a system interrupt gate (DPL3) with interrupt stack afterwards. Remove X86_TRAP_BP from the def_idts table which is used in idt_setup_traps(). Remove a redundant entry for X86_TRAP_NMI in def_idts while at it. Tested on both x86_64 and x86_32. [ tglx: Amended changelog with a description of the root cause ] Fixes: b70543a0b2b6("x86/idt: Move regular trap init to tables") Reported-and-tested-by: Yonghong Song Signed-off-by: Yonghong Song Signed-off-by: Thomas Gleixner Cc: a.p.zijlstra@chello.nl Cc: ast@fb.com Cc: oleg@redhat.com Cc: luto@kernel.org Cc: kernel-team@fb.com Link: https://lkml.kernel.org/r/20171108192845.552709-1-yhs@fb.com --- arch/x86/kernel/idt.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c index 6107ee1..014cb2f 100644 --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -92,8 +92,6 @@ static const __initdata struct idt_data def_idts[] = { INTG(X86_TRAP_DF, double_fault), #endif INTG(X86_TRAP_DB, debug), - INTG(X86_TRAP_NMI, nmi), - INTG(X86_TRAP_BP, int3), #ifdef CONFIG_X86_MCE INTG(X86_TRAP_MC, &machine_check),