From: tip-bot for Mike Travis <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: rja@sgi.com, peterz@infradead.org, bp@alien8.de,
linux-kernel@vger.kernel.org, torvalds@linux-foundation.org,
luto@amacapital.net, estabrook@sgi.com, hpa@zytor.com,
brgerst@gmail.com, akpm@linux-foundation.org, gfk@sgi.com,
dvlasenk@redhat.com, nzimmer@sgi.com, abanman@sgi.com,
mingo@kernel.org, tglx@linutronix.de, len.brown@intel.com,
sivanich@sgi.com, travis@sgi.com
Subject: [tip:x86/platform] x86/platform/UV: Move scir info to the per cpu info struct
Date: Wed, 4 May 2016 00:18:49 -0700 [thread overview]
Message-ID: <tip-d38bb135d814e96811e1a0778564d7a2df922e28@git.kernel.org> (raw)
In-Reply-To: <20160429215404.452538234@asylum.americas.sgi.com>
Commit-ID: d38bb135d814e96811e1a0778564d7a2df922e28
Gitweb: http://git.kernel.org/tip/d38bb135d814e96811e1a0778564d7a2df922e28
Author: Mike Travis <travis@sgi.com>
AuthorDate: Fri, 29 Apr 2016 16:54:13 -0500
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 4 May 2016 08:48:49 +0200
x86/platform/UV: Move scir info to the per cpu info struct
Change the references to the SCIR fields to the new per cpu info structs.
Tested-by: John Estabrook <estabrook@sgi.com>
Tested-by: Gary Kroening <gfk@sgi.com>
Tested-by: Nathan Zimmer <nzimmer@sgi.com>
Signed-off-by: Mike Travis <travis@sgi.com>
Reviewed-by: Dimitri Sivanich <sivanich@sgi.com>
Cc: Andrew Banman <abanman@sgi.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russ Anderson <rja@sgi.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160429215404.452538234@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/include/asm/uv/uv_hub.h | 17 ++++++++++-------
arch/x86/kernel/apic/x2apic_uv_x.c | 18 +++++++++---------
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 2ff0eb8..b8c5a61 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -127,6 +127,7 @@
*/
#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_BLADES * 2)
+/* System Controller Interface Reg info */
struct uv_scir_s {
struct timer_list timer;
unsigned long offset;
@@ -161,7 +162,6 @@ struct uv_hub_info_s {
unsigned char blade_processor_id;
unsigned char m_val;
unsigned char n_val;
- struct uv_scir_s scir;
};
DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
@@ -179,6 +179,9 @@ DECLARE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info);
#define uv_cpu_info this_cpu_ptr(&__uv_cpu_info)
#define uv_cpu_info_per(cpu) (&per_cpu(__uv_cpu_info, cpu))
+#define uv_scir_info (&uv_cpu_info->scir)
+#define uv_cpu_scir_info(cpu) (&uv_cpu_info_per(cpu)->scir)
+
/*
* HUB revision ranges for each UV HUB architecture.
* This is a software convention - NOT the hardware revision numbers in
@@ -686,9 +689,9 @@ DECLARE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
/* Update SCIR state */
static inline void uv_set_scir_bits(unsigned char value)
{
- if (uv_hub_info->scir.state != value) {
- uv_hub_info->scir.state = value;
- uv_write_local_mmr8(uv_hub_info->scir.offset, value);
+ if (uv_scir_info->state != value) {
+ uv_scir_info->state = value;
+ uv_write_local_mmr8(uv_scir_info->offset, value);
}
}
@@ -699,10 +702,10 @@ static inline unsigned long uv_scir_offset(int apicid)
static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
{
- if (uv_cpu_hub_info(cpu)->scir.state != value) {
+ if (uv_cpu_scir_info(cpu)->state != value) {
uv_write_global_mmr8(uv_cpu_to_pnode(cpu),
- uv_cpu_hub_info(cpu)->scir.offset, value);
- uv_cpu_hub_info(cpu)->scir.state = value;
+ uv_cpu_scir_info(cpu)->offset, value);
+ uv_cpu_scir_info(cpu)->state = value;
}
}
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 067aa51..c8acda9 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -756,8 +756,8 @@ static __init void uv_rtc_init(void)
*/
static void uv_heartbeat(unsigned long ignored)
{
- struct timer_list *timer = &uv_hub_info->scir.timer;
- unsigned char bits = uv_hub_info->scir.state;
+ struct timer_list *timer = &uv_scir_info->timer;
+ unsigned char bits = uv_scir_info->state;
/* flip heartbeat bit */
bits ^= SCIR_CPU_HEARTBEAT;
@@ -777,14 +777,14 @@ static void uv_heartbeat(unsigned long ignored)
static void uv_heartbeat_enable(int cpu)
{
- while (!uv_cpu_hub_info(cpu)->scir.enabled) {
- struct timer_list *timer = &uv_cpu_hub_info(cpu)->scir.timer;
+ while (!uv_cpu_scir_info(cpu)->enabled) {
+ struct timer_list *timer = &uv_cpu_scir_info(cpu)->timer;
uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY);
setup_timer(timer, uv_heartbeat, cpu);
timer->expires = jiffies + SCIR_CPU_HB_INTERVAL;
add_timer_on(timer, cpu);
- uv_cpu_hub_info(cpu)->scir.enabled = 1;
+ uv_cpu_scir_info(cpu)->enabled = 1;
/* also ensure that boot cpu is enabled */
cpu = 0;
@@ -794,9 +794,9 @@ static void uv_heartbeat_enable(int cpu)
#ifdef CONFIG_HOTPLUG_CPU
static void uv_heartbeat_disable(int cpu)
{
- if (uv_cpu_hub_info(cpu)->scir.enabled) {
- uv_cpu_hub_info(cpu)->scir.enabled = 0;
- del_timer(&uv_cpu_hub_info(cpu)->scir.timer);
+ if (uv_cpu_scir_info(cpu)->enabled) {
+ uv_cpu_scir_info(cpu)->enabled = 0;
+ del_timer(&uv_cpu_scir_info(cpu)->timer);
}
uv_set_cpu_scir_bits(cpu, 0xff);
}
@@ -1055,13 +1055,13 @@ void __init uv_system_init(void)
uv_cpu_hub_info(cpu)->numa_blade_id = blade;
uv_cpu_hub_info(cpu)->pnode = pnode;
- uv_cpu_hub_info(cpu)->scir.offset = uv_scir_offset(apicid);
uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;
uv_node_to_blade[nodeid] = blade;
uv_cpu_to_blade[cpu] = blade;
/* Initialize per cpu info list */
uv_cpu_info_per(cpu)->p_uv_hub_info = uv_cpu_hub_info(cpu);
+ uv_cpu_info_per(cpu)->scir.offset = uv_scir_offset(apicid);
}
/* Add blade/pnode info for nodes without cpus */
next prev parent reply other threads:[~2016-05-04 7:20 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-29 21:54 [PATCH 00/21] X86_64, UV: Update kernel for SGI UV4 support Mike Travis
2016-04-29 21:54 ` [PATCH 01/21] X86_64, UV: Add Initial UV4 definitions Mike Travis
2016-05-04 7:15 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 02/21] X86_64, UV: Add UV Architecture Defines Mike Travis
2016-05-04 7:15 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 03/21] X86_64, UV: Add UV4 Specific Defines Mike Travis
2016-05-04 7:16 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 04/21] X86_64, UV: Add UV MMR Illegal Access Function Mike Travis
2016-05-04 7:16 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 05/21] X86_64, UV: Prep for UV4 MMR updates Mike Travis
2016-05-04 7:16 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 06/21] X86_64, UV: Add UV4 Specific MMR definitions Mike Travis
2016-05-04 7:17 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 07/21] X86_64, UV: Disable Obsolete APIC ID fixup code used only on UV1 Mike Travis
2016-05-03 7:35 ` Ingo Molnar
2016-05-03 14:43 ` Mike Travis
2016-04-29 21:54 ` [PATCH 08/21] X86_64, UV: Clean up redunduncies after merge of UV4 MMR definitions Mike Travis
2016-05-04 7:17 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 09/21] X86_64, UV: Update MMIOH setup function to work for both UV3 and UV4 Mike Travis
2016-05-04 7:18 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 10/21] X86_64, UV: Create per cpu info structs to replace per hub info structs Mike Travis
2016-05-04 7:18 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 11/21] X86_64, UV: Move scir info to the per cpu info struct Mike Travis
2016-05-04 7:18 ` tip-bot for Mike Travis [this message]
2016-04-29 21:54 ` [PATCH 12/21] X86_64, UV: Move blade local processor ID " Mike Travis
2016-05-04 7:19 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 13/21] X86_64, UV: Allocate common per node hub info structs on local node Mike Travis
2016-05-04 7:19 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 14/21] X86_64, UV: Fold blade info into per node hub info structs Mike Travis
2016-05-04 7:19 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 15/21] X86_64, UV: Add UV4 addressing discovery function Mike Travis
2016-05-04 7:20 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 16/21] X86_64, UV: Add obtaining GAM Range Table from UV BIOS Mike Travis
2016-05-04 7:20 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 17/21] X86_64, UV: Support UV4 socket address changes Mike Travis
2016-05-04 7:21 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 18/21] X86_64, UV: Build GAM reference tables Mike Travis
2016-05-04 7:21 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 19/21] X86_64, UV: Update physical address conversions for UV4 Mike Travis
2016-05-04 7:21 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Mike Travis
2016-04-29 21:54 ` [PATCH 20/21] X86_64, UV: Remove Obsolete GRU MMR address translation Mike Travis
2016-05-04 7:22 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Dimitri Sivanich
2016-04-29 21:54 ` [PATCH 21/21] X86_64, UV: Fix incorrect nodes and pnodes for cpuless and memoryless nodes Mike Travis
2016-05-04 7:22 ` [tip:x86/platform] x86/platform/UV: " tip-bot for Dimitri Sivanich
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