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From: tip-bot for Tim Chen <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com,
	mingo@kernel.org, peterz@infradead.org,
	srinivas.pandruvada@linux.intel.com, tglx@linutronix.de,
	hpa@zytor.com
Subject: [tip:x86/core] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU
Date: Thu, 24 Nov 2016 11:53:51 -0800	[thread overview]
Message-ID: <tip-d3d37d850d1d77bd66bceb8326e6353d3314b270@git.kernel.org> (raw)
In-Reply-To: <9bbb885bedbef4eb50e197305eb16b160cff0831.1479844244.git.tim.c.chen@linux.intel.com>

Commit-ID:  d3d37d850d1d77bd66bceb8326e6353d3314b270
Gitweb:     http://git.kernel.org/tip/d3d37d850d1d77bd66bceb8326e6353d3314b270
Author:     Tim Chen <tim.c.chen@linux.intel.com>
AuthorDate: Tue, 22 Nov 2016 12:23:57 -0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 24 Nov 2016 20:44:20 +0100

x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU

Some Intel cores in a package can be boosted to a higher turbo frequency
with ITMT 3.0 technology. The scheduler can use the asymmetric packing
feature to move tasks to the more capable cores.

If ITMT is enabled, add SD_ASYM_PACKING flag to the thread and core
sched domains to enable asymmetric packing.

Co-developed-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Cc: linux-pm@vger.kernel.org
Cc: peterz@infradead.org
Cc: jolsa@redhat.com
Cc: rjw@rjwysocki.net
Cc: linux-acpi@vger.kernel.org
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: bp@suse.de
Link: http://lkml.kernel.org/r/9bbb885bedbef4eb50e197305eb16b160cff0831.1479844244.git.tim.c.chen@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

---
 arch/x86/kernel/smpboot.c | 28 ++++++++++++++++++++++++----
 1 file changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index ac61ee7..4f13062 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -482,22 +482,42 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 	return false;
 }
 
+#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC)
+static inline int x86_sched_itmt_flags(void)
+{
+	return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0;
+}
+
+#ifdef CONFIG_SCHED_MC
+static int x86_core_flags(void)
+{
+	return cpu_core_flags() | x86_sched_itmt_flags();
+}
+#endif
+#ifdef CONFIG_SCHED_SMT
+static int x86_smt_flags(void)
+{
+	return cpu_smt_flags() | x86_sched_itmt_flags();
+}
+#endif
+#endif
+
 static struct sched_domain_topology_level x86_numa_in_package_topology[] = {
 #ifdef CONFIG_SCHED_SMT
-	{ cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+	{ cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
 #endif
 #ifdef CONFIG_SCHED_MC
-	{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+	{ cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
 #endif
 	{ NULL, },
 };
 
 static struct sched_domain_topology_level x86_topology[] = {
 #ifdef CONFIG_SCHED_SMT
-	{ cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+	{ cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
 #endif
 #ifdef CONFIG_SCHED_MC
-	{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+	{ cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
 #endif
 	{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
 	{ NULL, },

  reply	other threads:[~2016-11-24 19:55 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-22 20:23 [PATCH v8 0/8] Support Intel Turbo Boost Max Technology 3.0 Tim Chen
2016-11-22 20:23 ` [PATCH v8 1/8] sched: Extend scheduler's asym packing Tim Chen
2016-11-23 13:09   ` Peter Zijlstra
2016-11-23 17:32     ` Tim Chen
2016-11-24 13:25   ` [tip:sched/core] " tip-bot for Tim Chen
2016-11-22 20:23 ` [PATCH v8 2/8] x86/topology: Define x86's arch_update_cpu_topology Tim Chen
2016-11-24 19:52   ` [tip:x86/core] " tip-bot for Tim Chen
2016-11-22 20:23 ` [PATCH v8 3/8] x86: Enable Intel Turbo Boost Max Technology 3.0 Tim Chen
2016-11-24 19:52   ` [tip:x86/core] " tip-bot for Tim Chen
2016-11-25  8:19     ` Ingo Molnar
2016-11-25  8:39       ` Peter Zijlstra
2016-11-25 19:06       ` Thomas Gleixner
2016-11-28  8:51         ` Ingo Molnar
2016-11-28 17:35           ` Tim Chen
2016-11-28 23:22             ` Rafael J. Wysocki
2016-11-29  7:11             ` Ingo Molnar
2016-11-29 18:45               ` Tim Chen
2016-11-22 20:23 ` [PATCH v8 4/8] x86/sysctl: Add sysctl for ITMT scheduling feature Tim Chen
2016-11-24 19:53   ` [tip:x86/core] " tip-bot for Tim Chen
2016-11-28  8:56   ` [PATCH v8 4/8] " Borislav Petkov
2016-11-29 17:30     ` Tim Chen
2016-11-29 17:51       ` Borislav Petkov
2016-11-22 20:23 ` [PATCH v8 5/8] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU Tim Chen
2016-11-24 19:53   ` tip-bot for Tim Chen [this message]
2016-11-22 20:23 ` [PATCH v8 6/8] acpi: bus: Enable HWP CPPC objects Tim Chen
2016-11-24 19:54   ` [tip:x86/core] acpi/bus: " tip-bot for Srinivas Pandruvada
2016-11-22 20:23 ` [PATCH v8 7/8] acpi: bus: Set _OSC for diverse core support Tim Chen
2016-11-24 19:54   ` [tip:x86/core] acpi/bus: " tip-bot for Srinivas Pandruvada
2016-11-22 20:24 ` [PATCH v8 8/8] cpufreq: intel_pstate: Use CPPC to get max performance Tim Chen
2016-11-24 19:55   ` [tip:x86/core] cpufreq/intel_pstate: " tip-bot for Rafael J. Wysocki
2016-12-07 19:06   ` [PATCH v8 8/8] cpufreq: intel_pstate: " Sebastian Andrzej Siewior
2016-12-07 23:12     ` Tim Chen
2016-12-07 23:29       ` Rafael J. Wysocki
2016-12-09 14:45         ` Sebastian Andrzej Siewior
2016-12-09 15:02           ` Rafael J. Wysocki
2016-12-09 23:52             ` [PATCH] ACPI / CPPC: Fix per-CPU pointers management Rafael J. Wysocki
2016-12-10 18:51               ` Sebastian Andrzej Siewior
2016-12-12  1:00                 ` Rafael J. Wysocki
2016-12-14  2:26               ` Rafael J. Wysocki

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